1*93e678edSClement Faure /* SPDX-License-Identifier: BSD-2-Clause */ 2*93e678edSClement Faure /* 3*93e678edSClement Faure * Copyright 2020 NXP 4*93e678edSClement Faure */ 5*93e678edSClement Faure #ifndef __LOCAL_H__ 6*93e678edSClement Faure #define __LOCAL_H__ 7*93e678edSClement Faure 8*93e678edSClement Faure #define DCP_CONTEXT_BUFFER_SIZE 208 9*93e678edSClement Faure #define DCP_MAX_TIMEOUT 10 10*93e678edSClement Faure #define DCP_SRAM_KEY_NB_SUBWORD 4 11*93e678edSClement Faure #define DCP_CLK_ENABLE_MASK GENMASK_32(11, 10) 12*93e678edSClement Faure 13*93e678edSClement Faure #endif /* __LOCAL_H__ */ 14