xref: /optee_os/core/drivers/crypto/stm32/stm32_hash.h (revision 45fecab081173ef58b1cb14b6ddf6892b0b9d3f6)
1 /* SPDX-License-Identifier: BSD-2-Clause */
2 /*
3  * Copyright (c) 2021-2025, STMicroelectronics - All Rights Reserved
4  */
5 
6 #ifndef STM32_HASH_H
7 #define STM32_HASH_H
8 
9 #include <drivers/clk.h>
10 #include <drivers/rstctrl.h>
11 #include <mm/core_memprot.h>
12 #include <stdint.h>
13 
14 /* Max size supported is SHA512 */
15 #define STM32_HASH_MAX_DIGEST_SIZE	U(64)
16 
17 enum stm32_hash_algo {
18 	STM32_HASH_MD5,
19 	STM32_HASH_SHA1,
20 	STM32_HASH_SHA224,
21 	STM32_HASH_SHA256,
22 	STM32_HASH_SHA384,
23 	STM32_HASH_SHA512,
24 	STM32_HASH_SHA3_224,
25 	STM32_HASH_SHA3_256,
26 	STM32_HASH_SHA3_384,
27 	STM32_HASH_SHA3_512,
28 };
29 
30 enum stm32_hash_mode {
31 	STM32_HMAC_MODE,
32 	STM32_HASH_MODE,
33 };
34 
35 struct stm32_hash_remain {
36 	uint32_t *buf;
37 	size_t len;
38 };
39 
40 struct stm32_hash_context {
41 	struct stm32_hash_device *dev;
42 	size_t digest_u32;
43 	size_t block_size;
44 	size_t queue_size;
45 	struct stm32_hash_remain remain;
46 	enum stm32_hash_mode mode;
47 	enum stm32_hash_algo algo;
48 	uint32_t save_mode;
49 	uint32_t imr;
50 	uint32_t str;
51 	uint32_t cr;
52 	uint32_t *csr;
53 };
54 
55 size_t stm32_hash_digest_size(struct stm32_hash_context *c);
56 TEE_Result stm32_hash_deep_copy(struct stm32_hash_context *dst,
57 				struct stm32_hash_context *src);
58 TEE_Result stm32_hash_alloc(struct stm32_hash_context *c,
59 			    enum stm32_hash_mode mode,
60 			    enum stm32_hash_algo algo);
61 void stm32_hash_free(struct stm32_hash_context *c);
62 TEE_Result stm32_hash_update(struct stm32_hash_context *ctx,
63 			     const uint8_t *buffer, size_t length);
64 TEE_Result stm32_hash_final(struct stm32_hash_context *c, uint8_t *digest,
65 			    const uint8_t *key, size_t len);
66 TEE_Result stm32_hash_init(struct stm32_hash_context *ctx, const uint8_t *key,
67 			   size_t len);
68 #endif /* STM32_HASH_H */
69