xref: /optee_os/core/drivers/crypto/caam/crypto.mk (revision bc12b0e95e3c63f46850c1e69c79cd6879c68543) 
1ifeq ($(CFG_NXP_CAAM),y)
2# CAAM Debug: define 3x32 bits value (same bit used to debug a module)
3# CFG_DBG_CAAM_TRACE  Module print trace
4# CFG_DBG_CAAM_DESC   Module descriptor dump
5# CFG_DBG_CAAM_BUF    Module buffer dump
6#
7# DBG_HAL    BIT32(0)  // HAL trace
8# DBG_CTRL   BIT32(1)  // Controller trace
9# DBG_MEM    BIT32(2)  // Memory utility trace
10# DBG_SGT    BIT32(3)  // Scatter Gather trace
11# DBG_PWR    BIT32(4)  // Power trace
12# DBG_JR     BIT32(5)  // Job Ring trace
13# DBG_RNG    BIT32(6)  // RNG trace
14# DBG_HASH   BIT32(7)  // Hash trace
15# DBG_RSA    BIT32(8)  // RSA trace
16# DBG_CIPHER BIT32(9)  // Cipher trace
17# DBG_BLOB   BIT32(10) // BLOB trace
18# DBG_DMAOBJ BIT32(11) // DMA Object Trace
19# DBG_ECC    BIT32(12) // ECC trace
20# DBG_DH     BIT32(13) // DH Trace
21# DBG_DSA    BIT32(14) // DSA trace
22# DBG_MP     BIT32(15) // MP trace
23CFG_DBG_CAAM_TRACE ?= 0x2
24CFG_DBG_CAAM_DESC ?= 0x0
25CFG_DBG_CAAM_BUF ?= 0x0
26
27# CAAM default drivers
28caam-drivers = RNG BLOB
29
30# CAAM default drivers connected to the HW crypto API
31caam-crypto-drivers = CIPHER HASH HMAC CMAC
32
33ifneq (,$(filter $(PLATFORM_FLAVOR),ls1012ardb ls1043ardb ls1046ardb))
34$(call force, CFG_CAAM_BIG_ENDIAN,y)
35$(call force, CFG_JR_BLOCK_SIZE,0x10000)
36$(call force, CFG_JR_INDEX,2)
37$(call force, CFG_JR_INT,105)
38$(call force, CFG_CAAM_SGT_ALIGN,4)
39$(call force, CFG_CAAM_64BIT,y)
40$(call force, CFG_NXP_CAAM_SGT_V1,y)
41$(call force, CFG_CAAM_ITR,n)
42caam-crypto-drivers += RSA DSA ECC DH MATH
43else ifneq (,$(filter $(PLATFORM_FLAVOR),ls1088ardb ls2088ardb ls1028ardb))
44$(call force, CFG_CAAM_LITTLE_ENDIAN,y)
45$(call force, CFG_JR_BLOCK_SIZE,0x10000)
46$(call force, CFG_JR_INDEX,2)
47$(call force, CFG_JR_INT,174)
48$(call force, CFG_NXP_CAAM_SGT_V2,y)
49$(call force, CFG_CAAM_SGT_ALIGN,4)
50$(call force, CFG_CAAM_64BIT,y)
51$(call force, CFG_CAAM_ITR,n)
52caam-crypto-drivers += RSA DSA ECC DH MATH
53else ifneq (,$(filter $(PLATFORM_FLAVOR),lx2160aqds lx2160ardb))
54$(call force, CFG_CAAM_LITTLE_ENDIAN,y)
55$(call force, CFG_JR_BLOCK_SIZE,0x10000)
56$(call force, CFG_JR_INDEX,2)
57$(call force, CFG_JR_INT, 174)
58$(call force, CFG_NB_JOBS_QUEUE, 80)
59$(call force, CFG_NXP_CAAM_SGT_V2,y)
60$(call force, CFG_CAAM_SGT_ALIGN,4)
61$(call force, CFG_CAAM_64BIT,y)
62$(call force, CFG_CAAM_ITR,n)
63caam-crypto-drivers += RSA DSA ECC DH MATH
64else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist) $(mx8qx-flavorlist)))
65$(call force, CFG_CAAM_SIZE_ALIGN,4)
66$(call force, CFG_JR_BLOCK_SIZE,0x10000)
67$(call force, CFG_JR_INDEX,3)
68$(call force, CFG_JR_INT,486)
69$(call force, CFG_NXP_CAAM_SGT_V1,y)
70caam-crypto-drivers += RSA DSA ECC DH MATH
71else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist) $(mx8mn-flavorlist) \
72	$(mx8mp-flavorlist) $(mx8mq-flavorlist)))
73$(call force, CFG_JR_BLOCK_SIZE,0x1000)
74$(call force, CFG_JR_INDEX,2)
75$(call force, CFG_JR_INT,146)
76$(call force, CFG_NXP_CAAM_SGT_V1,y)
77$(call force, CFG_JR_HAB_INDEX,0)
78caam-drivers += MP
79caam-crypto-drivers += RSA DSA ECC DH MATH
80else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8ulp-flavorlist)))
81$(call force, CFG_JR_BLOCK_SIZE,0x1000)
82$(call force, CFG_JR_INDEX,2)
83$(call force, CFG_JR_INT,114)
84$(call force, CFG_NXP_CAAM_SGT_V1,y)
85$(call force, CFG_CAAM_ITR,n)
86else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
87$(call force, CFG_JR_BLOCK_SIZE,0x1000)
88$(call force, CFG_JR_INDEX,0)
89$(call force, CFG_JR_INT,137)
90$(call force, CFG_NXP_CAAM_SGT_V1,y)
91$(call force, CFG_CAAM_ITR,n)
92else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist) $(mx7d-flavorlist) \
93	$(mx7s-flavorlist)))
94$(call force, CFG_JR_BLOCK_SIZE,0x1000)
95$(call force, CFG_JR_INDEX,0)
96$(call force, CFG_JR_INT,137)
97$(call force, CFG_NXP_CAAM_SGT_V1,y)
98caam-drivers += MP
99caam-crypto-drivers += RSA DSA ECC DH MATH
100else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist) $(mx6qp-flavorlist) \
101	$(mx6sx-flavorlist) $(mx6d-flavorlist) $(mx6dl-flavorlist) \
102        $(mx6s-flavorlist) $(mx8ulp-flavorlist)))
103$(call force, CFG_JR_BLOCK_SIZE,0x1000)
104$(call force, CFG_JR_INDEX,0)
105$(call force, CFG_JR_INT,137)
106$(call force, CFG_NXP_CAAM_SGT_V1,y)
107else
108$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
109endif
110
111# Disable the i.MX CAAM driver
112$(call force,CFG_IMX_CAAM,n,Mandated by CFG_NXP_CAAM)
113
114# CAAM buffer alignment size
115CFG_CAAM_SIZE_ALIGN ?= 1
116
117# Default padding number for SGT allocation
118CFG_CAAM_SGT_ALIGN ?= 1
119
120# Enable job ring interruption
121CFG_CAAM_ITR ?= y
122
123# Keep the CFG_JR_INDEX as secure at runtime
124CFG_NXP_CAAM_RUNTIME_JR ?= y
125
126# Define the RSA Private Key Format used by the CAAM
127#   Format #1: (n, d)
128#   Format #2: (p, q, d)
129#   Format #3: (p, q, dp, dq, qp)
130CFG_NXP_CAAM_RSA_KEY_FORMAT ?= 3
131
132# Disable device tree status of the secure job ring
133CFG_CAAM_JR_DISABLE_NODE ?= y
134
135# Enable CAAM non-crypto drivers
136$(foreach drv, $(caam-drivers), $(eval CFG_NXP_CAAM_$(drv)_DRV ?= y))
137
138# Disable software RNG if CAAM RNG driver is enabled
139ifeq ($(CFG_NXP_CAAM_RNG_DRV), y)
140$(call force, CFG_WITH_SOFTWARE_PRNG,n,Mandated by CFG_NXP_CAAM_RNG_DRV)
141endif
142
143ifeq ($(CFG_CRYPTO_DRIVER), y)
144CFG_CRYPTO_DRIVER_DEBUG ?= 0
145
146# Enable CAAM Crypto drivers
147$(foreach drv, $(caam-crypto-drivers), $(eval CFG_NXP_CAAM_$(drv)_DRV ?= y))
148
149# Enable MAC crypto driver
150ifeq ($(call cfg-one-enabled,CFG_NXP_CAAM_HMAC_DRV CFG_NXP_CAAM_CMAC_DRV),y)
151$(call force, CFG_CRYPTO_DRV_MAC,y,Mandated by CFG_NXP_CAAM_HMAC/CMAC_DRV)
152endif
153
154# Enable CIPHER crypto driver
155ifeq ($(CFG_NXP_CAAM_CIPHER_DRV), y)
156$(call force, CFG_CRYPTO_DRV_CIPHER,y,Mandated by CFG_NXP_CAAM_CIPHER_DRV)
157endif
158
159# Enable HASH crypto driver
160ifeq ($(CFG_NXP_CAAM_HASH_DRV), y)
161$(call force, CFG_CRYPTO_DRV_HASH,y,Mandated by CFG_NXP_CAAM_HASH_DRV)
162endif
163
164# Enable RSA crypto driver
165ifeq ($(CFG_NXP_CAAM_RSA_DRV), y)
166$(call force, CFG_CRYPTO_DRV_RSA,y,Mandated by CFG_NXP_CAAM_RSA_DRV)
167endif
168
169# Enable ECC crypto driver
170ifeq ($(CFG_NXP_CAAM_ECC_DRV), y)
171$(call force, CFG_CRYPTO_DRV_ECC,y,Mandated by CFG_NXP_CAAM_ECC_DRV)
172endif
173
174# Enable DSA crypto driver
175ifeq ($(CFG_NXP_CAAM_DSA_DRV), y)
176$(call force, CFG_CRYPTO_DRV_DSA,y,Mandated by CFG_NXP_CAAM_DSA_DRV)
177endif
178
179# Enable DH crypto driver
180ifeq ($(CFG_NXP_CAAM_DH_DRV), y)
181$(call force, CFG_CRYPTO_DRV_DH,y,Mandated by CFG_NXP_CAAM_DH_DRV)
182endif
183
184# Enable ACIPHER crypto driver
185ifeq ($(call cfg-one-enabled,CFG_CRYPTO_DRV_RSA CFG_CRYPTO_DRV_ECC \
186	CFG_CRYPTO_DRV_DSA CFG_CRYPTO_DRV_DH),y)
187$(call force, CFG_CRYPTO_DRV_ACIPHER,y,Mandated by CFG_CRYPTO_DRV_{RSA|ECC|DSA|DH})
188endif
189
190# Disable SM2 as it is not supported by the CAAM driver
191ifeq ($(CFG_NXP_CAAM_ECC_DRV),y)
192$(call force,CFG_CRYPTO_SM2_PKE,n)
193$(call force,CFG_CRYPTO_SM2_KEP,n)
194$(call force,CFG_CRYPTO_SM2_DSA,n)
195endif
196
197endif # CFG_CRYPTO_DRIVER
198endif # CFG_NXP_CAAM
199