1ifeq ($(CFG_NXP_CAAM),y) 2# CAAM Debug: define 3x32 bits value (same bit used to debug a module) 3# CFG_DBG_CAAM_TRACE Module print trace 4# CFG_DBG_CAAM_DESC Module descriptor dump 5# CFG_DBG_CAAM_BUF Module buffer dump 6# 7# DBG_HAL BIT32(0) // HAL trace 8# DBG_CTRL BIT32(1) // Controller trace 9# DBG_MEM BIT32(2) // Memory utility trace 10# DBG_SGT BIT32(3) // Scatter Gather trace 11# DBG_PWR BIT32(4) // Power trace 12# DBG_JR BIT32(5) // Job Ring trace 13# DBG_RNG BIT32(6) // RNG trace 14# DBG_HASH BIT32(7) // Hash trace 15# DBG_RSA BIT32(8) // RSA trace 16# DBG_CIPHER BIT32(9) // Cipher trace 17# DBG_BLOB BIT32(10) // BLOB trace 18# DBG_DMAOBJ BIT32(11) // DMA Object Trace 19# DBG_ECC BIT32(12) // ECC trace 20# DBG_DH BIT32(13) // DH Trace 21# DBG_DSA BIT32(14) // DSA trace 22# DBG_MP BIT32(15) // MP trace 23CFG_DBG_CAAM_TRACE ?= 0x2 24CFG_DBG_CAAM_DESC ?= 0x0 25CFG_DBG_CAAM_BUF ?= 0x0 26 27# CAAM default drivers 28caam-drivers = RNG BLOB 29 30# CAAM default drivers connected to the HW crypto API 31caam-crypto-drivers = CIPHER HASH HMAC CMAC 32 33ifneq (,$(filter $(PLATFORM_FLAVOR),ls1012ardb ls1043ardb ls1046ardb)) 34$(call force, CFG_CAAM_BIG_ENDIAN,y) 35$(call force, CFG_JR_BLOCK_SIZE,0x10000) 36$(call force, CFG_JR_INDEX,2) 37$(call force, CFG_JR_INT,105) 38$(call force, CFG_CAAM_SGT_ALIGN,4) 39$(call force, CFG_CAAM_64BIT,y) 40$(call force, CFG_NXP_CAAM_SGT_V1,y) 41$(call force, CFG_CAAM_ITR,n) 42caam-crypto-drivers += RSA DSA ECC DH MATH 43else ifneq (,$(filter $(PLATFORM_FLAVOR),ls1088ardb ls2088ardb ls1028ardb)) 44$(call force, CFG_CAAM_LITTLE_ENDIAN,y) 45$(call force, CFG_JR_BLOCK_SIZE,0x10000) 46$(call force, CFG_JR_INDEX,2) 47$(call force, CFG_JR_INT,174) 48$(call force, CFG_NXP_CAAM_SGT_V2,y) 49$(call force, CFG_CAAM_SGT_ALIGN,4) 50$(call force, CFG_CAAM_64BIT,y) 51$(call force, CFG_CAAM_ITR,n) 52caam-crypto-drivers += RSA DSA ECC DH MATH 53else ifneq (,$(filter $(PLATFORM_FLAVOR),lx2160aqds lx2160ardb)) 54$(call force, CFG_CAAM_LITTLE_ENDIAN,y) 55$(call force, CFG_JR_BLOCK_SIZE,0x10000) 56$(call force, CFG_JR_INDEX,2) 57$(call force, CFG_JR_INT, 174) 58$(call force, CFG_NB_JOBS_QUEUE, 80) 59$(call force, CFG_NXP_CAAM_SGT_V2,y) 60$(call force, CFG_CAAM_SGT_ALIGN,4) 61$(call force, CFG_CAAM_64BIT,y) 62$(call force, CFG_CAAM_ITR,n) 63caam-crypto-drivers += RSA DSA ECC DH MATH 64else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist) $(mx8qx-flavorlist))) 65$(call force, CFG_CAAM_SIZE_ALIGN,4) 66$(call force, CFG_JR_BLOCK_SIZE,0x10000) 67$(call force, CFG_JR_INDEX,3) 68$(call force, CFG_JR_INT,486) 69$(call force, CFG_NXP_CAAM_SGT_V1,y) 70caam-crypto-drivers += RSA DSA ECC DH MATH 71else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8dxl-flavorlist))) 72$(call force, CFG_CAAM_SIZE_ALIGN,4) 73$(call force, CFG_JR_BLOCK_SIZE,0x10000) 74$(call force, CFG_JR_INDEX,3) 75$(call force, CFG_JR_INT,356) 76$(call force, CFG_NXP_CAAM_SGT_V1,y) 77$(call force, CFG_CAAM_JR_DISABLE_NODE,n) 78caam-crypto-drivers += RSA DSA ECC DH MATH 79else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist) $(mx8mn-flavorlist) \ 80 $(mx8mp-flavorlist) $(mx8mq-flavorlist))) 81$(call force, CFG_JR_BLOCK_SIZE,0x1000) 82$(call force, CFG_JR_INDEX,2) 83$(call force, CFG_JR_INT,146) 84$(call force, CFG_NXP_CAAM_SGT_V1,y) 85$(call force, CFG_JR_HAB_INDEX,0) 86caam-drivers += MP DEK 87caam-crypto-drivers += RSA DSA ECC DH MATH 88else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8ulp-flavorlist))) 89$(call force, CFG_JR_BLOCK_SIZE,0x1000) 90$(call force, CFG_JR_INDEX,2) 91$(call force, CFG_JR_INT,114) 92$(call force, CFG_NXP_CAAM_SGT_V1,y) 93$(call force, CFG_CAAM_ITR,n) 94else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist))) 95$(call force, CFG_JR_BLOCK_SIZE,0x1000) 96$(call force, CFG_JR_INDEX,0) 97$(call force, CFG_JR_INT,137) 98$(call force, CFG_NXP_CAAM_SGT_V1,y) 99$(call force, CFG_CAAM_ITR,n) 100else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist) $(mx7d-flavorlist) \ 101 $(mx7s-flavorlist))) 102$(call force, CFG_JR_BLOCK_SIZE,0x1000) 103$(call force, CFG_JR_INDEX,0) 104$(call force, CFG_JR_INT,137) 105$(call force, CFG_NXP_CAAM_SGT_V1,y) 106caam-drivers += MP 107caam-crypto-drivers += RSA DSA ECC DH MATH 108else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist) $(mx6qp-flavorlist) \ 109 $(mx6sx-flavorlist) $(mx6d-flavorlist) $(mx6dl-flavorlist) \ 110 $(mx6s-flavorlist) $(mx8ulp-flavorlist))) 111$(call force, CFG_JR_BLOCK_SIZE,0x1000) 112$(call force, CFG_JR_INDEX,0) 113$(call force, CFG_JR_INT,137) 114$(call force, CFG_NXP_CAAM_SGT_V1,y) 115else 116$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)") 117endif 118 119# Disable the i.MX CAAM driver 120$(call force,CFG_IMX_CAAM,n,Mandated by CFG_NXP_CAAM) 121 122# CAAM buffer alignment size 123CFG_CAAM_SIZE_ALIGN ?= 1 124 125# Default padding number for SGT allocation 126CFG_CAAM_SGT_ALIGN ?= 1 127 128# Enable job ring interruption 129CFG_CAAM_ITR ?= y 130 131# Keep the CFG_JR_INDEX as secure at runtime 132CFG_NXP_CAAM_RUNTIME_JR ?= y 133 134# Define the RSA Private Key Format used by the CAAM 135# Format #1: (n, d) 136# Format #2: (p, q, d) 137# Format #3: (p, q, dp, dq, qp) 138CFG_NXP_CAAM_RSA_KEY_FORMAT ?= 3 139 140# Disable device tree status of the secure job ring 141CFG_CAAM_JR_DISABLE_NODE ?= y 142 143# Enable CAAM non-crypto drivers 144$(foreach drv, $(caam-drivers), $(eval CFG_NXP_CAAM_$(drv)_DRV ?= y)) 145 146# Disable software RNG if CAAM RNG driver is enabled 147ifeq ($(CFG_NXP_CAAM_RNG_DRV), y) 148$(call force, CFG_WITH_SOFTWARE_PRNG,n,Mandated by CFG_NXP_CAAM_RNG_DRV) 149endif 150 151# DEK driver requires the SM driver to be enabled 152ifeq ($(CFG_NXP_CAAM_DEK_DRV), y) 153$(call force, CFG_NXP_CAAM_SM_DRV,y,Mandated by CFG_NXP_CAAM_DEK_DRV) 154endif 155 156ifeq ($(CFG_CRYPTO_DRIVER), y) 157CFG_CRYPTO_DRIVER_DEBUG ?= 0 158 159# Enable CAAM Crypto drivers 160$(foreach drv, $(caam-crypto-drivers), $(eval CFG_NXP_CAAM_$(drv)_DRV ?= y)) 161 162# Enable MAC crypto driver 163ifeq ($(call cfg-one-enabled,CFG_NXP_CAAM_HMAC_DRV CFG_NXP_CAAM_CMAC_DRV),y) 164$(call force, CFG_CRYPTO_DRV_MAC,y,Mandated by CFG_NXP_CAAM_HMAC/CMAC_DRV) 165endif 166 167# Enable CIPHER crypto driver 168ifeq ($(CFG_NXP_CAAM_CIPHER_DRV), y) 169$(call force, CFG_CRYPTO_DRV_CIPHER,y,Mandated by CFG_NXP_CAAM_CIPHER_DRV) 170endif 171 172# Enable HASH crypto driver 173ifeq ($(CFG_NXP_CAAM_HASH_DRV), y) 174$(call force, CFG_CRYPTO_DRV_HASH,y,Mandated by CFG_NXP_CAAM_HASH_DRV) 175endif 176 177# Enable RSA crypto driver 178ifeq ($(CFG_NXP_CAAM_RSA_DRV), y) 179$(call force, CFG_CRYPTO_DRV_RSA,y,Mandated by CFG_NXP_CAAM_RSA_DRV) 180endif 181 182# Enable ECC crypto driver 183ifeq ($(CFG_NXP_CAAM_ECC_DRV), y) 184$(call force, CFG_CRYPTO_DRV_ECC,y,Mandated by CFG_NXP_CAAM_ECC_DRV) 185endif 186 187# Enable DSA crypto driver 188ifeq ($(CFG_NXP_CAAM_DSA_DRV), y) 189$(call force, CFG_CRYPTO_DRV_DSA,y,Mandated by CFG_NXP_CAAM_DSA_DRV) 190endif 191 192# Enable DH crypto driver 193ifeq ($(CFG_NXP_CAAM_DH_DRV), y) 194$(call force, CFG_CRYPTO_DRV_DH,y,Mandated by CFG_NXP_CAAM_DH_DRV) 195endif 196 197# Enable ACIPHER crypto driver 198ifeq ($(call cfg-one-enabled,CFG_CRYPTO_DRV_RSA CFG_CRYPTO_DRV_ECC \ 199 CFG_CRYPTO_DRV_DSA CFG_CRYPTO_DRV_DH),y) 200$(call force, CFG_CRYPTO_DRV_ACIPHER,y,Mandated by CFG_CRYPTO_DRV_{RSA|ECC|DSA|DH}) 201endif 202 203# Disable SM2 as it is not supported by the CAAM driver 204ifeq ($(CFG_NXP_CAAM_ECC_DRV),y) 205$(call force,CFG_CRYPTO_SM2_PKE,n) 206$(call force,CFG_CRYPTO_SM2_KEP,n) 207$(call force,CFG_CRYPTO_SM2_DSA,n) 208endif 209 210endif # CFG_CRYPTO_DRIVER 211endif # CFG_NXP_CAAM 212