1ifeq ($(CFG_NXP_CAAM),y) 2# 3# CAAM Debug: define 3x32 bits value (same bit used to debug a module) 4# CFG_DBG_CAAM_TRACE Module print trace 5# CFG_DBG_CAAM_DESC Module descriptor dump 6# CFG_DBG_CAAM_BUF Module buffer dump 7# 8# DBG_HAL BIT32(0) // HAL trace 9# DBG_CTRL BIT32(1) // Controller trace 10# DBG_MEM BIT32(2) // Memory utility trace 11# DBG_SGT BIT32(3) // Scatter Gather trace 12# DBG_PWR BIT32(4) // Power trace 13# DBG_JR BIT32(5) // Job Ring trace 14# DBG_RNG BIT32(6) // RNG trace 15# DBG_HASH BIT32(7) // Hash trace 16# DBG_RSA BIT32(8) // RSA trace 17# DBG_CIPHER BIT32(9) // Cipher trace 18# DBG_BLOB BIT32(10) // BLOB trace 19# DBG_DMAOBJ BIT32(11) // DMA Object Trace 20# DBG_ECC BIT32(12) // ECC trace 21# DBG_DH BIT32(13) // DH Trace 22# DBG_DSA BIT32(14) // DSA trace 23# DBG_MP BIT32(15) // MP trace 24 25CFG_DBG_CAAM_TRACE ?= 0x2 26CFG_DBG_CAAM_DESC ?= 0x0 27CFG_DBG_CAAM_BUF ?= 0x0 28 29ifneq (,$(filter $(PLATFORM_FLAVOR),ls1012ardb ls1043ardb ls1046ardb)) 30$(call force, CFG_CAAM_SIZE_ALIGN,1) 31$(call force, CFG_CAAM_BIG_ENDIAN,y) 32$(call force, CFG_JR_BLOCK_SIZE,0x10000) 33$(call force, CFG_JR_INDEX,2) 34$(call force, CFG_JR_INT,105) 35$(call force, CFG_NXP_CAAM_SGT_V1,y) 36else ifneq (,$(filter $(PLATFORM_FLAVOR),ls1088ardb ls2088ardb ls1028ardb)) 37$(call force, CFG_CAAM_SIZE_ALIGN,1) 38$(call force, CFG_CAAM_LITTLE_ENDIAN,y) 39$(call force, CFG_JR_BLOCK_SIZE,0x10000) 40$(call force, CFG_JR_INDEX,2) 41$(call force, CFG_JR_INT,174) 42$(call force, CFG_NXP_CAAM_SGT_V2,y) 43else ifneq (,$(filter $(PLATFORM_FLAVOR),lx2160aqds lx2160ardb)) 44$(call force, CFG_CAAM_SIZE_ALIGN,1) 45$(call force, CFG_CAAM_LITTLE_ENDIAN,y) 46$(call force, CFG_JR_BLOCK_SIZE,0x10000) 47$(call force, CFG_JR_INDEX,2) 48$(call force, CFG_JR_INT, 174) 49$(call force, CFG_NB_JOBS_QUEUE, 80) 50$(call force, CFG_NXP_CAAM_SGT_V2,y) 51else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist) $(mx8qx-flavorlist))) 52$(call force, CFG_CAAM_SIZE_ALIGN,4) 53$(call force, CFG_JR_BLOCK_SIZE,0x10000) 54$(call force, CFG_JR_INDEX,3) 55$(call force, CFG_JR_INT,486) 56$(call force, CFG_NXP_CAAM_SGT_V1,y) 57else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist) $(mx8mn-flavorlist) $(mx8mp-flavorlist) $(mx8mq-flavorlist))) 58$(call force, CFG_CAAM_SIZE_ALIGN,1) 59$(call force, CFG_JR_BLOCK_SIZE,0x1000) 60$(call force, CFG_JR_INDEX,2) 61$(call force, CFG_JR_INT,146) 62$(call force, CFG_NXP_CAAM_SGT_V1,y) 63else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8ulp-flavorlist))) 64$(call force, CFG_CAAM_SIZE_ALIGN,1) 65$(call force, CFG_JR_BLOCK_SIZE,0x1000) 66$(call force, CFG_JR_INDEX,2) 67$(call force, CFG_JR_INT,114) 68$(call force, CFG_NXP_CAAM_SGT_V1,y) 69$(call force, CFG_CAAM_ITR,n) 70else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist))) 71$(call force, CFG_CAAM_SIZE_ALIGN,1) 72$(call force, CFG_JR_BLOCK_SIZE,0x1000) 73$(call force, CFG_JR_INDEX,0) 74$(call force, CFG_JR_INT,137) 75$(call force, CFG_NXP_CAAM_SGT_V1,y) 76$(call force, CFG_CAAM_ITR,n) 77else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist) $(mx6q-flavorlist) \ 78 $(mx6qp-flavorlist) $(mx6sx-flavorlist) $(mx6d-flavorlist) $(mx6dl-flavorlist) \ 79 $(mx6s-flavorlist) $(mx7d-flavorlist) $(mx7s-flavorlist) $(mx8ulp-flavorlist))) 80$(call force, CFG_CAAM_SIZE_ALIGN,1) 81$(call force, CFG_JR_BLOCK_SIZE,0x1000) 82$(call force, CFG_JR_INDEX,0) 83$(call force, CFG_JR_INT,137) 84$(call force, CFG_NXP_CAAM_SGT_V1,y) 85else 86$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)") 87endif 88 89# Enable the BLOB module used for the hardware unique key 90CFG_NXP_CAAM_BLOB_DRV ?= y 91 92ifeq ($(CFG_LS),y) 93CFG_CRYPTO_DRIVER ?= y 94CFG_CAAM_64BIT ?= y 95 96$(call force, CFG_CAAM_SGT_ALIGN,4) 97 98else # !CFG_LS, that is, MX family of platforms 99 100CFG_CAAM_ITR ?= y 101CFG_CAAM_SGT_ALIGN ?= 1 102$(call force,CFG_IMX_CAAM,n) 103 104endif # !CFG_LS 105 106ifeq ($(CFG_CRYPTO_DRIVER), y) 107 108# Crypto Driver Debug 109# DRV_DBG_TRACE BIT32(0) // Driver trace 110# DRV_DBG_BUF BIT32(1) // Driver dump Buffer 111CFG_CRYPTO_DRIVER_DEBUG ?= 0 112 113$(call force, CFG_NXP_CAAM_RUNTIME_JR, y) 114 115# Force to 'y' the CFG_NXP_CAAM_xxx_DRV to enable the CAAM HW driver 116# and enable the associated CFG_CRYPTO_DRV_xxx Crypto driver 117# API 118# 119# Example: Enable CFG_CRYPTO_DRV_HASH and CFG_NXP_CAAM_HASH_DRV 120# $(eval $(call cryphw-enable-drv-hw, HASH)) 121define cryphw-enable-drv-hw 122_var := $(strip $(1)) 123$$(call force, CFG_NXP_CAAM_$$(_var)_DRV, y) 124$$(call force, CFG_CRYPTO_DRV_$$(_var), y) 125endef 126 127# Return 'y' if at least one of the variable 128# CFG_CRYPTO_xxx_HW is 'y' 129cryphw-one-enabled = $(call cfg-one-enabled, \ 130 $(foreach v,$(1), CFG_NXP_CAAM_$(v)_DRV)) 131 132$(call force, CFG_NXP_CAAM_RNG_DRV, y) 133CFG_WITH_SOFTWARE_PRNG = n 134$(eval $(call cryphw-enable-drv-hw, HASH)) 135$(eval $(call cryphw-enable-drv-hw, CIPHER)) 136$(call force, CFG_NXP_CAAM_HMAC_DRV,y) 137$(call force, CFG_NXP_CAAM_CMAC_DRV,y) 138 139ifeq ($(CFG_LS),y) 140 141$(eval $(call cryphw-enable-drv-hw, RSA)) 142$(eval $(call cryphw-enable-drv-hw, ECC)) 143$(eval $(call cryphw-enable-drv-hw, DH)) 144$(eval $(call cryphw-enable-drv-hw, DSA)) 145 146# Define the RSA Private Key Format used by the CAAM 147# Format #1: (n, d) 148# Format #2: (p, q, d) 149# Format #3: (p, q, dp, dq, qp) 150CFG_NXP_CAAM_RSA_KEY_FORMAT ?= 3 151 152else # !CFG_LS, that is, MX family of platforms 153 154ifneq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) \ 155 $(CFG_MX6S) $(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX) $(CFG_MX7ULP) $(CFG_MX8ULP)), y) 156$(eval $(call cryphw-enable-drv-hw, RSA)) 157$(eval $(call cryphw-enable-drv-hw, ECC)) 158$(eval $(call cryphw-enable-drv-hw, DH)) 159$(eval $(call cryphw-enable-drv-hw, DSA)) 160 161# Define the RSA Private Key Format used by the CAAM 162# Format #1: (n, d) 163# Format #2: (p, q, d) 164# Format #3: (p, q, dp, dq, qp) 165CFG_NXP_CAAM_RSA_KEY_FORMAT ?= 3 166endif 167 168ifneq ($(filter y, $(CFG_MX8QM) $(CFG_MX8QX) $(CFG_MX8DXL)), y) 169$(eval $(call cryphw-enable-drv-hw, MP)) 170endif 171 172endif # !CFG_LS 173 174$(call force, CFG_NXP_CAAM_ACIPHER_DRV, $(call cryphw-one-enabled, RSA ECC DH DSA)) 175$(call force, CFG_CRYPTO_DRV_MAC, $(call cryphw-one-enabled, HMAC CMAC)) 176CFG_CRYPTO_DRV_ACIPHER ?= $(CFG_NXP_CAAM_ACIPHER_DRV) 177 178endif # CFG_CRYPTO_DRIVER 179endif # CFG_NXP_CAAM