1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright 2017-2021, 2023 NXP 4 * 5 * Brief CAAM Global Controller. 6 */ 7 #include <assert.h> 8 #include <caam_acipher.h> 9 #include <caam_cipher.h> 10 #include <caam_common.h> 11 #include <caam_hal_cfg.h> 12 #include <caam_hal_clk.h> 13 #include <caam_hal_ctrl.h> 14 #include <caam_hash.h> 15 #include <caam_jr.h> 16 #include <caam_key.h> 17 #include <caam_blob.h> 18 #include <caam_mp.h> 19 #include <caam_pwr.h> 20 #include <caam_rng.h> 21 #include <caam_sm.h> 22 #include <drivers/imx_snvs.h> 23 #include <initcall.h> 24 #include <kernel/panic.h> 25 #include <tee_api_types.h> 26 27 /* 28 * If the CAAM DMA only supports 32 bits physical addresses, OPTEE must 29 * be located within the 32 bits address space. 30 */ 31 #ifndef CFG_CAAM_64BIT 32 static_assert((CFG_TZDRAM_START + CFG_TZDRAM_SIZE) < UINT32_MAX); 33 #endif 34 35 /* Crypto driver initialization */ 36 static TEE_Result crypto_driver_init(void) 37 { 38 TEE_Result retresult = TEE_ERROR_GENERIC; 39 enum caam_status retstatus = CAAM_FAILURE; 40 struct caam_jrcfg jrcfg = {}; 41 42 /* Enable the CAAM Clock */ 43 caam_hal_clk_enable(true); 44 45 /* Set OTP as master key if the platform is closed */ 46 if (snvs_is_device_closed()) { 47 retresult = imx_snvs_set_master_otpmk(); 48 if (retresult && retresult != TEE_ERROR_NOT_IMPLEMENTED) 49 goto exit_init; 50 } 51 52 retstatus = caam_hal_cfg_get_conf(&jrcfg); 53 if (retstatus != CAAM_NO_ERROR) { 54 retresult = TEE_ERROR_NOT_SUPPORTED; 55 goto exit_init; 56 } 57 58 /* Initialize the CAAM Controller */ 59 caam_hal_ctrl_init(jrcfg.base); 60 61 /* Initialize the Job Ring to be used */ 62 retstatus = caam_jr_init(&jrcfg); 63 if (retstatus != CAAM_NO_ERROR) { 64 retresult = TEE_ERROR_GENERIC; 65 goto exit_init; 66 } 67 68 /* Initialize the RNG Module */ 69 retstatus = caam_rng_init(jrcfg.base); 70 if (retstatus != CAAM_NO_ERROR) { 71 retresult = TEE_ERROR_GENERIC; 72 goto exit_init; 73 } 74 75 /* Initialize the Hash Module */ 76 retstatus = caam_hash_init(&jrcfg); 77 if (retstatus != CAAM_NO_ERROR) { 78 retresult = TEE_ERROR_GENERIC; 79 goto exit_init; 80 } 81 82 /* Initialize the MATH Module */ 83 retstatus = caam_math_init(&jrcfg); 84 if (retstatus != CAAM_NO_ERROR) { 85 retresult = TEE_ERROR_GENERIC; 86 goto exit_init; 87 } 88 89 /* Initialize the RSA Module */ 90 retstatus = caam_rsa_init(&jrcfg); 91 if (retstatus != CAAM_NO_ERROR) { 92 retresult = TEE_ERROR_GENERIC; 93 goto exit_init; 94 } 95 96 /* Initialize the Cipher Module */ 97 retstatus = caam_cipher_init(jrcfg.base); 98 if (retstatus != CAAM_NO_ERROR) { 99 retresult = TEE_ERROR_GENERIC; 100 goto exit_init; 101 } 102 103 /* Initialize the HMAC Module */ 104 retstatus = caam_hmac_init(&jrcfg); 105 if (retstatus != CAAM_NO_ERROR) { 106 retresult = TEE_ERROR_GENERIC; 107 goto exit_init; 108 } 109 110 /* Initialize the BLOB Module */ 111 retstatus = caam_blob_mkvb_init(jrcfg.base); 112 if (retstatus != CAAM_NO_ERROR) { 113 retresult = TEE_ERROR_GENERIC; 114 goto exit_init; 115 } 116 117 /* Initialize the CMAC Module */ 118 retstatus = caam_cmac_init(jrcfg.base); 119 if (retstatus != CAAM_NO_ERROR) { 120 retresult = TEE_ERROR_GENERIC; 121 goto exit_init; 122 } 123 124 /* Initialize the ECC Module */ 125 retstatus = caam_ecc_init(&jrcfg); 126 if (retstatus != CAAM_NO_ERROR) { 127 retresult = TEE_ERROR_GENERIC; 128 goto exit_init; 129 } 130 131 /* Initialize the DH Module */ 132 retstatus = caam_dh_init(&jrcfg); 133 if (retstatus != CAAM_NO_ERROR) { 134 retresult = TEE_ERROR_GENERIC; 135 goto exit_init; 136 } 137 138 /* Initialize the DSA Module */ 139 retstatus = caam_dsa_init(&jrcfg); 140 if (retstatus != CAAM_NO_ERROR) { 141 retresult = TEE_ERROR_GENERIC; 142 goto exit_init; 143 } 144 145 /* Initialize the Manufacturing Protection Module */ 146 retstatus = caam_mp_init(jrcfg.base); 147 if (retstatus != CAAM_NO_ERROR && retstatus != CAAM_NOT_SUPPORTED) { 148 retresult = TEE_ERROR_GENERIC; 149 goto exit_init; 150 } 151 152 /* Initialize the secure memory */ 153 retstatus = caam_sm_init(&jrcfg); 154 if (retstatus != CAAM_NO_ERROR) { 155 retresult = TEE_ERROR_GENERIC; 156 goto exit_init; 157 } 158 159 /* Initialize the KEY Module */ 160 retstatus = caam_key_init(); 161 if (retstatus != CAAM_NO_ERROR) { 162 retresult = TEE_ERROR_GENERIC; 163 goto exit_init; 164 } 165 166 /* Everything is OK, register the Power Management handler */ 167 caam_pwr_init(); 168 169 /* 170 * Configure Job Rings to NS World 171 * If the Driver Crypto is not used CFG_NXP_CAAM_RUNTIME_JR is not 172 * enable, hence relax the JR used for the CAAM configuration to 173 * the Non-Secure 174 */ 175 if (jrcfg.base) 176 caam_hal_cfg_setup_nsjobring(&jrcfg); 177 178 retresult = TEE_SUCCESS; 179 exit_init: 180 if (retresult != TEE_SUCCESS) { 181 EMSG("CAAM Driver initialization (0x%" PRIx32 ")", retresult); 182 panic(); 183 } 184 185 return retresult; 186 } 187 188 early_init(crypto_driver_init); 189 190 /* Crypto driver late initialization to complete on-going CAAM operations */ 191 static TEE_Result init_caam_late(void) 192 { 193 enum caam_status ret = CAAM_BUSY; 194 195 ret = caam_jr_complete(); 196 197 if (ret != CAAM_NO_ERROR) { 198 EMSG("CAAM initialization failed"); 199 panic(); 200 } 201 202 return TEE_SUCCESS; 203 } 204 205 early_init_late(init_caam_late); 206