1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright 2017-2021, 2023 NXP 4 * 5 * Brief CAAM Global Controller. 6 */ 7 #include <assert.h> 8 #include <caam_acipher.h> 9 #include <caam_cipher.h> 10 #include <caam_ae.h> 11 #include <caam_common.h> 12 #include <caam_hal_cfg.h> 13 #include <caam_hal_clk.h> 14 #include <caam_hal_ctrl.h> 15 #include <caam_hash.h> 16 #include <caam_jr.h> 17 #include <caam_key.h> 18 #include <caam_blob.h> 19 #include <caam_mp.h> 20 #include <caam_pwr.h> 21 #include <caam_rng.h> 22 #include <caam_sm.h> 23 #include <drivers/imx_snvs.h> 24 #include <initcall.h> 25 #include <kernel/panic.h> 26 #include <tee_api_types.h> 27 28 /* 29 * If the CAAM DMA only supports 32 bits physical addresses, OPTEE must 30 * be located within the 32 bits address space. 31 */ 32 #ifndef CFG_CAAM_64BIT 33 static_assert((CFG_TZDRAM_START + CFG_TZDRAM_SIZE) < UINT32_MAX); 34 #endif 35 36 /* Crypto driver initialization */ 37 static TEE_Result crypto_driver_init(void) 38 { 39 TEE_Result retresult = TEE_ERROR_GENERIC; 40 enum caam_status retstatus = CAAM_FAILURE; 41 struct caam_jrcfg jrcfg = {}; 42 43 /* Enable the CAAM Clock */ 44 caam_hal_clk_enable(true); 45 46 /* Set OTP as master key if the platform is closed */ 47 if (snvs_is_device_closed()) { 48 retresult = imx_snvs_set_master_otpmk(); 49 if (retresult && retresult != TEE_ERROR_NOT_IMPLEMENTED) 50 goto exit_init; 51 } 52 53 retstatus = caam_hal_cfg_get_conf(&jrcfg); 54 if (retstatus != CAAM_NO_ERROR) { 55 retresult = TEE_ERROR_NOT_SUPPORTED; 56 goto exit_init; 57 } 58 59 /* Initialize the CAAM Controller */ 60 caam_hal_ctrl_init(jrcfg.base); 61 62 /* Initialize the Job Ring to be used */ 63 retstatus = caam_jr_init(&jrcfg); 64 if (retstatus != CAAM_NO_ERROR) { 65 retresult = TEE_ERROR_GENERIC; 66 goto exit_init; 67 } 68 69 /* Initialize the RNG Module */ 70 retstatus = caam_rng_init(jrcfg.base); 71 if (retstatus != CAAM_NO_ERROR) { 72 retresult = TEE_ERROR_GENERIC; 73 goto exit_init; 74 } 75 76 /* Initialize the Hash Module */ 77 retstatus = caam_hash_init(&jrcfg); 78 if (retstatus != CAAM_NO_ERROR) { 79 retresult = TEE_ERROR_GENERIC; 80 goto exit_init; 81 } 82 83 /* Initialize the MATH Module */ 84 retstatus = caam_math_init(&jrcfg); 85 if (retstatus != CAAM_NO_ERROR) { 86 retresult = TEE_ERROR_GENERIC; 87 goto exit_init; 88 } 89 90 /* Initialize the RSA Module */ 91 retstatus = caam_rsa_init(&jrcfg); 92 if (retstatus != CAAM_NO_ERROR) { 93 retresult = TEE_ERROR_GENERIC; 94 goto exit_init; 95 } 96 97 /* Initialize the Cipher Module */ 98 retstatus = caam_cipher_init(jrcfg.base); 99 if (retstatus != CAAM_NO_ERROR) { 100 retresult = TEE_ERROR_GENERIC; 101 goto exit_init; 102 } 103 104 /* Initialize the Authenticated Encryption Module */ 105 retstatus = caam_ae_init(jrcfg.base); 106 if (retstatus != CAAM_NO_ERROR) { 107 retresult = TEE_ERROR_GENERIC; 108 goto exit_init; 109 } 110 111 /* Initialize the HMAC Module */ 112 retstatus = caam_hmac_init(&jrcfg); 113 if (retstatus != CAAM_NO_ERROR) { 114 retresult = TEE_ERROR_GENERIC; 115 goto exit_init; 116 } 117 118 /* Initialize the BLOB Module */ 119 retstatus = caam_blob_mkvb_init(jrcfg.base); 120 if (retstatus != CAAM_NO_ERROR) { 121 retresult = TEE_ERROR_GENERIC; 122 goto exit_init; 123 } 124 125 /* Initialize the CMAC Module */ 126 retstatus = caam_cmac_init(jrcfg.base); 127 if (retstatus != CAAM_NO_ERROR) { 128 retresult = TEE_ERROR_GENERIC; 129 goto exit_init; 130 } 131 132 /* Initialize the ECC Module */ 133 retstatus = caam_ecc_init(&jrcfg); 134 if (retstatus != CAAM_NO_ERROR) { 135 retresult = TEE_ERROR_GENERIC; 136 goto exit_init; 137 } 138 139 /* Initialize the DH Module */ 140 retstatus = caam_dh_init(&jrcfg); 141 if (retstatus != CAAM_NO_ERROR) { 142 retresult = TEE_ERROR_GENERIC; 143 goto exit_init; 144 } 145 146 /* Initialize the DSA Module */ 147 retstatus = caam_dsa_init(&jrcfg); 148 if (retstatus != CAAM_NO_ERROR) { 149 retresult = TEE_ERROR_GENERIC; 150 goto exit_init; 151 } 152 153 /* Initialize the Manufacturing Protection Module */ 154 retstatus = caam_mp_init(jrcfg.base); 155 if (retstatus != CAAM_NO_ERROR && retstatus != CAAM_NOT_SUPPORTED) { 156 retresult = TEE_ERROR_GENERIC; 157 goto exit_init; 158 } 159 160 /* Initialize the secure memory */ 161 retstatus = caam_sm_init(&jrcfg); 162 if (retstatus != CAAM_NO_ERROR) { 163 retresult = TEE_ERROR_GENERIC; 164 goto exit_init; 165 } 166 167 /* Initialize the KEY Module */ 168 retstatus = caam_key_init(); 169 if (retstatus != CAAM_NO_ERROR) { 170 retresult = TEE_ERROR_GENERIC; 171 goto exit_init; 172 } 173 174 /* Everything is OK, register the Power Management handler */ 175 caam_pwr_init(); 176 177 /* 178 * Configure Job Rings to NS World 179 * If the Driver Crypto is not used CFG_NXP_CAAM_RUNTIME_JR is not 180 * enable, hence relax the JR used for the CAAM configuration to 181 * the Non-Secure 182 */ 183 if (jrcfg.base) 184 caam_hal_cfg_setup_nsjobring(&jrcfg); 185 186 retresult = TEE_SUCCESS; 187 exit_init: 188 if (retresult != TEE_SUCCESS) { 189 EMSG("CAAM Driver initialization (0x%" PRIx32 ")", retresult); 190 panic(); 191 } 192 193 return retresult; 194 } 195 196 early_init(crypto_driver_init); 197 198 /* Crypto driver late initialization to complete on-going CAAM operations */ 199 static TEE_Result init_caam_late(void) 200 { 201 enum caam_status ret = CAAM_BUSY; 202 203 ret = caam_jr_complete(); 204 205 if (ret != CAAM_NO_ERROR) { 206 EMSG("CAAM initialization failed"); 207 panic(); 208 } 209 210 return TEE_SUCCESS; 211 } 212 213 early_init_late(init_caam_late); 214