xref: /optee_os/core/drivers/crypto/caam/caam_ctrl.c (revision faaf0c5975d2e5817d14d3f9227425896f5e43be)
12d7a8964SCedric Neveux // SPDX-License-Identifier: BSD-2-Clause
22d7a8964SCedric Neveux /*
31495f6c4SClement Faure  * Copyright 2017-2021, 2023 NXP
42d7a8964SCedric Neveux  *
52d7a8964SCedric Neveux  * Brief   CAAM Global Controller.
62d7a8964SCedric Neveux  */
7bd738228SClement Faure #include <assert.h>
8796ea6d8SCedric Neveux #include <caam_acipher.h>
9dfb57b8bSCedric Neveux #include <caam_cipher.h>
10*faaf0c59SOlivier Masse #include <caam_ae.h>
112d7a8964SCedric Neveux #include <caam_common.h>
122d7a8964SCedric Neveux #include <caam_hal_cfg.h>
132d7a8964SCedric Neveux #include <caam_hal_clk.h>
142d7a8964SCedric Neveux #include <caam_hal_ctrl.h>
152d7a8964SCedric Neveux #include <caam_hash.h>
162d7a8964SCedric Neveux #include <caam_jr.h>
171495f6c4SClement Faure #include <caam_key.h>
18919323d9SRouven Czerwinski #include <caam_blob.h>
19d538d293SClement Faure #include <caam_mp.h>
202d7a8964SCedric Neveux #include <caam_pwr.h>
212d7a8964SCedric Neveux #include <caam_rng.h>
222a12ae23SClement Faure #include <caam_sm.h>
238dafb568SClement Faure #include <drivers/imx_snvs.h>
242d7a8964SCedric Neveux #include <initcall.h>
252d7a8964SCedric Neveux #include <kernel/panic.h>
262d7a8964SCedric Neveux #include <tee_api_types.h>
272d7a8964SCedric Neveux 
28bd738228SClement Faure /*
29bd738228SClement Faure  * If the CAAM DMA only supports 32 bits physical addresses, OPTEE must
30bd738228SClement Faure  * be located within the 32 bits address space.
31bd738228SClement Faure  */
32bd738228SClement Faure #ifndef CFG_CAAM_64BIT
33bd738228SClement Faure static_assert((CFG_TZDRAM_START + CFG_TZDRAM_SIZE) < UINT32_MAX);
34bd738228SClement Faure #endif
35bd738228SClement Faure 
362d7a8964SCedric Neveux /* Crypto driver initialization */
crypto_driver_init(void)372d7a8964SCedric Neveux static TEE_Result crypto_driver_init(void)
382d7a8964SCedric Neveux {
392d7a8964SCedric Neveux 	TEE_Result retresult = TEE_ERROR_GENERIC;
402d7a8964SCedric Neveux 	enum caam_status retstatus = CAAM_FAILURE;
412d7a8964SCedric Neveux 	struct caam_jrcfg jrcfg = {};
422d7a8964SCedric Neveux 
432d7a8964SCedric Neveux 	/* Enable the CAAM Clock */
442d7a8964SCedric Neveux 	caam_hal_clk_enable(true);
452d7a8964SCedric Neveux 
468dafb568SClement Faure 	/* Set OTP as master key if the platform is closed */
478dafb568SClement Faure 	if (snvs_is_device_closed()) {
488dafb568SClement Faure 		retresult = imx_snvs_set_master_otpmk();
498dafb568SClement Faure 		if (retresult && retresult != TEE_ERROR_NOT_IMPLEMENTED)
508dafb568SClement Faure 			goto exit_init;
518dafb568SClement Faure 	}
528dafb568SClement Faure 
532d7a8964SCedric Neveux 	retstatus = caam_hal_cfg_get_conf(&jrcfg);
542d7a8964SCedric Neveux 	if (retstatus != CAAM_NO_ERROR) {
552d7a8964SCedric Neveux 		retresult = TEE_ERROR_NOT_SUPPORTED;
562d7a8964SCedric Neveux 		goto exit_init;
572d7a8964SCedric Neveux 	}
582d7a8964SCedric Neveux 
592d7a8964SCedric Neveux 	/* Initialize the CAAM Controller */
602d7a8964SCedric Neveux 	caam_hal_ctrl_init(jrcfg.base);
612d7a8964SCedric Neveux 
622d7a8964SCedric Neveux 	/* Initialize the Job Ring to be used */
632d7a8964SCedric Neveux 	retstatus = caam_jr_init(&jrcfg);
642d7a8964SCedric Neveux 	if (retstatus != CAAM_NO_ERROR) {
652d7a8964SCedric Neveux 		retresult = TEE_ERROR_GENERIC;
662d7a8964SCedric Neveux 		goto exit_init;
672d7a8964SCedric Neveux 	}
682d7a8964SCedric Neveux 
692d7a8964SCedric Neveux 	/* Initialize the RNG Module */
702d7a8964SCedric Neveux 	retstatus = caam_rng_init(jrcfg.base);
712d7a8964SCedric Neveux 	if (retstatus != CAAM_NO_ERROR) {
722d7a8964SCedric Neveux 		retresult = TEE_ERROR_GENERIC;
732d7a8964SCedric Neveux 		goto exit_init;
742d7a8964SCedric Neveux 	}
752d7a8964SCedric Neveux 
762d7a8964SCedric Neveux 	/* Initialize the Hash Module */
77efcdff18SClement Faure 	retstatus = caam_hash_init(&jrcfg);
782d7a8964SCedric Neveux 	if (retstatus != CAAM_NO_ERROR) {
792d7a8964SCedric Neveux 		retresult = TEE_ERROR_GENERIC;
802d7a8964SCedric Neveux 		goto exit_init;
812d7a8964SCedric Neveux 	}
822d7a8964SCedric Neveux 
83796ea6d8SCedric Neveux 	/* Initialize the MATH Module */
848b63b7ddSClement Faure 	retstatus = caam_math_init(&jrcfg);
85796ea6d8SCedric Neveux 	if (retstatus != CAAM_NO_ERROR) {
86796ea6d8SCedric Neveux 		retresult = TEE_ERROR_GENERIC;
87796ea6d8SCedric Neveux 		goto exit_init;
88796ea6d8SCedric Neveux 	}
89796ea6d8SCedric Neveux 
90796ea6d8SCedric Neveux 	/* Initialize the RSA Module */
918b63b7ddSClement Faure 	retstatus = caam_rsa_init(&jrcfg);
92796ea6d8SCedric Neveux 	if (retstatus != CAAM_NO_ERROR) {
93796ea6d8SCedric Neveux 		retresult = TEE_ERROR_GENERIC;
94796ea6d8SCedric Neveux 		goto exit_init;
95796ea6d8SCedric Neveux 	}
96796ea6d8SCedric Neveux 
97dfb57b8bSCedric Neveux 	/* Initialize the Cipher Module */
98dfb57b8bSCedric Neveux 	retstatus = caam_cipher_init(jrcfg.base);
99dfb57b8bSCedric Neveux 	if (retstatus != CAAM_NO_ERROR) {
100dfb57b8bSCedric Neveux 		retresult = TEE_ERROR_GENERIC;
101dfb57b8bSCedric Neveux 		goto exit_init;
102dfb57b8bSCedric Neveux 	}
103dfb57b8bSCedric Neveux 
104*faaf0c59SOlivier Masse 	/* Initialize the Authenticated Encryption Module */
105*faaf0c59SOlivier Masse 	retstatus = caam_ae_init(jrcfg.base);
106*faaf0c59SOlivier Masse 	if (retstatus != CAAM_NO_ERROR) {
107*faaf0c59SOlivier Masse 		retresult = TEE_ERROR_GENERIC;
108*faaf0c59SOlivier Masse 		goto exit_init;
109*faaf0c59SOlivier Masse 	}
110*faaf0c59SOlivier Masse 
11181ab436bSCedric Neveux 	/* Initialize the HMAC Module */
112efcdff18SClement Faure 	retstatus = caam_hmac_init(&jrcfg);
11381ab436bSCedric Neveux 	if (retstatus != CAAM_NO_ERROR) {
11481ab436bSCedric Neveux 		retresult = TEE_ERROR_GENERIC;
11581ab436bSCedric Neveux 		goto exit_init;
11681ab436bSCedric Neveux 	}
11781ab436bSCedric Neveux 
118919323d9SRouven Czerwinski 	/* Initialize the BLOB Module */
119919323d9SRouven Czerwinski 	retstatus = caam_blob_mkvb_init(jrcfg.base);
120919323d9SRouven Czerwinski 	if (retstatus != CAAM_NO_ERROR) {
121919323d9SRouven Czerwinski 		retresult = TEE_ERROR_GENERIC;
122919323d9SRouven Czerwinski 		goto exit_init;
123919323d9SRouven Czerwinski 	}
124919323d9SRouven Czerwinski 
1251453ab03SClement Faure 	/* Initialize the CMAC Module */
1261453ab03SClement Faure 	retstatus = caam_cmac_init(jrcfg.base);
1271453ab03SClement Faure 	if (retstatus != CAAM_NO_ERROR) {
1281453ab03SClement Faure 		retresult = TEE_ERROR_GENERIC;
1291453ab03SClement Faure 		goto exit_init;
1301453ab03SClement Faure 	}
1311453ab03SClement Faure 
132503b5c01SClement Faure 	/* Initialize the ECC Module */
1338b63b7ddSClement Faure 	retstatus = caam_ecc_init(&jrcfg);
134503b5c01SClement Faure 	if (retstatus != CAAM_NO_ERROR) {
135503b5c01SClement Faure 		retresult = TEE_ERROR_GENERIC;
136503b5c01SClement Faure 		goto exit_init;
137503b5c01SClement Faure 	}
138503b5c01SClement Faure 
139ba7c81e9SClement Faure 	/* Initialize the DH Module */
1408b63b7ddSClement Faure 	retstatus = caam_dh_init(&jrcfg);
141ba7c81e9SClement Faure 	if (retstatus != CAAM_NO_ERROR) {
142ba7c81e9SClement Faure 		retresult = TEE_ERROR_GENERIC;
143ba7c81e9SClement Faure 		goto exit_init;
144ba7c81e9SClement Faure 	}
145ba7c81e9SClement Faure 
1464b383f73SClement Faure 	/* Initialize the DSA Module */
1474b383f73SClement Faure 	retstatus = caam_dsa_init(&jrcfg);
1484b383f73SClement Faure 	if (retstatus != CAAM_NO_ERROR) {
1494b383f73SClement Faure 		retresult = TEE_ERROR_GENERIC;
1504b383f73SClement Faure 		goto exit_init;
1514b383f73SClement Faure 	}
1524b383f73SClement Faure 
153d538d293SClement Faure 	/* Initialize the Manufacturing Protection Module */
154d538d293SClement Faure 	retstatus = caam_mp_init(jrcfg.base);
155d538d293SClement Faure 	if (retstatus != CAAM_NO_ERROR && retstatus != CAAM_NOT_SUPPORTED) {
156d538d293SClement Faure 		retresult = TEE_ERROR_GENERIC;
157d538d293SClement Faure 		goto exit_init;
158d538d293SClement Faure 	}
159d538d293SClement Faure 
1602a12ae23SClement Faure 	/* Initialize the secure memory */
1612a12ae23SClement Faure 	retstatus = caam_sm_init(&jrcfg);
1622a12ae23SClement Faure 	if (retstatus != CAAM_NO_ERROR) {
1632a12ae23SClement Faure 		retresult = TEE_ERROR_GENERIC;
1642a12ae23SClement Faure 		goto exit_init;
1652a12ae23SClement Faure 	}
1662a12ae23SClement Faure 
1671495f6c4SClement Faure 	/* Initialize the KEY Module */
1681495f6c4SClement Faure 	retstatus = caam_key_init();
1691495f6c4SClement Faure 	if (retstatus != CAAM_NO_ERROR) {
1701495f6c4SClement Faure 		retresult = TEE_ERROR_GENERIC;
1711495f6c4SClement Faure 		goto exit_init;
1721495f6c4SClement Faure 	}
1731495f6c4SClement Faure 
1742d7a8964SCedric Neveux 	/* Everything is OK, register the Power Management handler */
1752d7a8964SCedric Neveux 	caam_pwr_init();
1762d7a8964SCedric Neveux 
1772d7a8964SCedric Neveux 	/*
1782d7a8964SCedric Neveux 	 * Configure Job Rings to NS World
1792d7a8964SCedric Neveux 	 * If the Driver Crypto is not used CFG_NXP_CAAM_RUNTIME_JR is not
1802d7a8964SCedric Neveux 	 * enable, hence relax the JR used for the CAAM configuration to
1812d7a8964SCedric Neveux 	 * the Non-Secure
1822d7a8964SCedric Neveux 	 */
1832d7a8964SCedric Neveux 	if (jrcfg.base)
1842d7a8964SCedric Neveux 		caam_hal_cfg_setup_nsjobring(&jrcfg);
1852d7a8964SCedric Neveux 
1862d7a8964SCedric Neveux 	retresult = TEE_SUCCESS;
1872d7a8964SCedric Neveux exit_init:
1882d7a8964SCedric Neveux 	if (retresult != TEE_SUCCESS) {
1892d7a8964SCedric Neveux 		EMSG("CAAM Driver initialization (0x%" PRIx32 ")", retresult);
1902d7a8964SCedric Neveux 		panic();
1912d7a8964SCedric Neveux 	}
1922d7a8964SCedric Neveux 
1932d7a8964SCedric Neveux 	return retresult;
1942d7a8964SCedric Neveux }
1952d7a8964SCedric Neveux 
1969d09e917SRouven Czerwinski early_init(crypto_driver_init);
1972d7a8964SCedric Neveux 
1982d7a8964SCedric Neveux /* Crypto driver late initialization to complete on-going CAAM operations */
init_caam_late(void)1992d7a8964SCedric Neveux static TEE_Result init_caam_late(void)
2002d7a8964SCedric Neveux {
2012d7a8964SCedric Neveux 	enum caam_status ret = CAAM_BUSY;
2022d7a8964SCedric Neveux 
2032d7a8964SCedric Neveux 	ret = caam_jr_complete();
2042d7a8964SCedric Neveux 
2052d7a8964SCedric Neveux 	if (ret != CAAM_NO_ERROR) {
2062d7a8964SCedric Neveux 		EMSG("CAAM initialization failed");
2072d7a8964SCedric Neveux 		panic();
2082d7a8964SCedric Neveux 	}
2092d7a8964SCedric Neveux 
2102d7a8964SCedric Neveux 	return TEE_SUCCESS;
2112d7a8964SCedric Neveux }
2122d7a8964SCedric Neveux 
2139d09e917SRouven Czerwinski early_init_late(init_caam_late);
214