1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2016, Xilinx Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 #include <assert.h> 29 #include <drivers/cdns_uart.h> 30 #include <io.h> 31 #include <keep.h> 32 #include <mm/core_mmu.h> 33 #include <util.h> 34 35 #define CDNS_UART_CONTROL 0 36 #define CDNS_UART_MODE 4 37 #define CDNS_UART_IEN 8 38 #define CDNS_UART_IRQ_STATUS 0x14 39 #define CDNS_UART_CHANNEL_STATUS 0x2c 40 #define CDNS_UART_FIFO 0x30 41 #define CDNS_UART_SIZE 0x34 42 43 #define CDNS_UART_CONTROL_RXRES BIT(0) 44 #define CDNS_UART_CONTROL_TXRES BIT(1) 45 #define CDNS_UART_CONTROL_RXEN BIT(2) 46 #define CDNS_UART_CONTROL_TXEN BIT(4) 47 48 #define CDNS_UART_MODE_8BIT (0 << 1) 49 #define CDNS_UART_MODE_PARITY_NONE (0x4 << 3) 50 #define CDNS_UART_MODE_1STP (0 << 6) 51 52 #define CDNS_UART_CHANNEL_STATUS_TFUL BIT(4) 53 #define CDNS_UART_CHANNEL_STATUS_TEMPTY BIT(3) 54 #define CDNS_UART_CHANNEL_STATUS_REMPTY BIT(1) 55 56 #define CDNS_UART_IRQ_RXTRIG BIT(0) 57 #define CDNS_UART_IRQ_RXTOUT BIT(8) 58 59 static vaddr_t chip_to_base(struct serial_chip *chip) 60 { 61 struct cdns_uart_data *pd = 62 container_of(chip, struct cdns_uart_data, chip); 63 64 return io_pa_or_va(&pd->base, CDNS_UART_SIZE); 65 } 66 67 static void cdns_uart_flush(struct serial_chip *chip) 68 { 69 vaddr_t base = chip_to_base(chip); 70 71 while (!(io_read32(base + CDNS_UART_CHANNEL_STATUS) & 72 CDNS_UART_CHANNEL_STATUS_TEMPTY)) 73 ; 74 } 75 76 static bool cdns_uart_have_rx_data(struct serial_chip *chip) 77 { 78 vaddr_t base = chip_to_base(chip); 79 80 return !(io_read32(base + CDNS_UART_CHANNEL_STATUS) & 81 CDNS_UART_CHANNEL_STATUS_REMPTY); 82 } 83 84 static int cdns_uart_getchar(struct serial_chip *chip) 85 { 86 vaddr_t base = chip_to_base(chip); 87 88 while (!cdns_uart_have_rx_data(chip)) 89 ; 90 return io_read32(base + CDNS_UART_FIFO) & 0xff; 91 } 92 93 static void cdns_uart_putc(struct serial_chip *chip, int ch) 94 { 95 vaddr_t base = chip_to_base(chip); 96 97 /* Wait until there is space in the FIFO */ 98 while (io_read32(base + CDNS_UART_CHANNEL_STATUS) & 99 CDNS_UART_CHANNEL_STATUS_TFUL) 100 ; 101 102 /* Send the character */ 103 io_write32(base + CDNS_UART_FIFO, ch); 104 } 105 106 107 static const struct serial_ops cdns_uart_ops = { 108 .flush = cdns_uart_flush, 109 .getchar = cdns_uart_getchar, 110 .have_rx_data = cdns_uart_have_rx_data, 111 .putc = cdns_uart_putc, 112 }; 113 DECLARE_KEEP_PAGER(cdns_uart_ops); 114 115 /* 116 * we rely on the bootloader having set up the HW correctly, we just enable 117 * transmitter/receiver here, just in case. 118 */ 119 void cdns_uart_init(struct cdns_uart_data *pd, paddr_t base, uint32_t uart_clk, 120 uint32_t baud_rate) 121 { 122 pd->base.pa = base; 123 pd->chip.ops = &cdns_uart_ops; 124 125 if (!uart_clk || !baud_rate) 126 return; 127 128 /* Enable UART and RX/TX */ 129 io_write32(base + CDNS_UART_CONTROL, 130 CDNS_UART_CONTROL_RXEN | CDNS_UART_CONTROL_TXEN); 131 132 cdns_uart_flush(&pd->chip); 133 } 134