1 /* 2 * Copyright (c) 2016, Xilinx Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 #include <compiler.h> 28 #include <drivers/cdns_uart.h> 29 #include <io.h> 30 #include <util.h> 31 32 #define CDNS_UART_CONTROL 0 33 #define CDNS_UART_MODE 4 34 #define CDNS_UART_IEN 8 35 #define CDNS_UART_IRQ_STATUS 0x14 36 #define CDNS_UART_CHANNEL_STATUS 0x2c 37 #define CDNS_UART_FIFO 0x30 38 39 #define CDNS_UART_CONTROL_RXRES BIT(0) 40 #define CDNS_UART_CONTROL_TXRES BIT(1) 41 #define CDNS_UART_CONTROL_RXEN BIT(2) 42 #define CDNS_UART_CONTROL_TXEN BIT(4) 43 44 #define CDNS_UART_MODE_8BIT (0 << 1) 45 #define CDNS_UART_MODE_PARITY_NONE (0x4 << 3) 46 #define CDNS_UART_MODE_1STP (0 << 6) 47 48 #define CDNS_UART_CHANNEL_STATUS_TFUL BIT(4) 49 #define CDNS_UART_CHANNEL_STATUS_TEMPTY BIT(3) 50 #define CDNS_UART_CHANNEL_STATUS_REMPTY BIT(1) 51 52 #define CDNS_UART_IRQ_RXTRIG BIT(0) 53 #define CDNS_UART_IRQ_RXTOUT BIT(8) 54 55 void cdns_uart_flush(vaddr_t base) 56 { 57 while (!(read32(base + CDNS_UART_CHANNEL_STATUS) & 58 CDNS_UART_CHANNEL_STATUS_TEMPTY)) 59 ; 60 } 61 62 /* 63 * we rely on the bootloader having set up the HW correctly, we just enable 64 * transmitter/receiver here, just in case. 65 */ 66 void cdns_uart_init(vaddr_t base, uint32_t uart_clk, uint32_t baud_rate) 67 { 68 if (!base || !uart_clk || !baud_rate) 69 return; 70 71 /* Enable UART and RX/TX */ 72 write32(CDNS_UART_CONTROL_RXEN | CDNS_UART_CONTROL_TXEN, 73 base + CDNS_UART_CONTROL); 74 75 cdns_uart_flush(base); 76 } 77 78 void cdns_uart_putc(int ch, vaddr_t base) 79 { 80 /* Wait until there is space in the FIFO */ 81 while (read32(base + CDNS_UART_CHANNEL_STATUS) & 82 CDNS_UART_CHANNEL_STATUS_TFUL) 83 ; 84 85 /* Send the character */ 86 write32(ch, base + CDNS_UART_FIFO); 87 } 88 89 bool cdns_uart_have_rx_data(vaddr_t base) 90 { 91 return !(read32(base + CDNS_UART_CHANNEL_STATUS) & 92 CDNS_UART_CHANNEL_STATUS_REMPTY); 93 } 94 95 int cdns_uart_getchar(vaddr_t base) 96 { 97 while (!cdns_uart_have_rx_data(base)) 98 ; 99 return read32(base + CDNS_UART_FIFO) & 0xff; 100 } 101