1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2016, Xilinx Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 #include <assert.h> 29 #include <drivers/cdns_uart.h> 30 #include <io.h> 31 #include <keep.h> 32 #include <mm/core_mmu.h> 33 #include <util.h> 34 35 #define CDNS_UART_CONTROL 0 36 #define CDNS_UART_MODE 4 37 #define CDNS_UART_IEN 8 38 #define CDNS_UART_IRQ_STATUS 0x14 39 #define CDNS_UART_CHANNEL_STATUS 0x2c 40 #define CDNS_UART_FIFO 0x30 41 42 #define CDNS_UART_CONTROL_RXRES BIT(0) 43 #define CDNS_UART_CONTROL_TXRES BIT(1) 44 #define CDNS_UART_CONTROL_RXEN BIT(2) 45 #define CDNS_UART_CONTROL_TXEN BIT(4) 46 47 #define CDNS_UART_MODE_8BIT (0 << 1) 48 #define CDNS_UART_MODE_PARITY_NONE (0x4 << 3) 49 #define CDNS_UART_MODE_1STP (0 << 6) 50 51 #define CDNS_UART_CHANNEL_STATUS_TFUL BIT(4) 52 #define CDNS_UART_CHANNEL_STATUS_TEMPTY BIT(3) 53 #define CDNS_UART_CHANNEL_STATUS_REMPTY BIT(1) 54 55 #define CDNS_UART_IRQ_RXTRIG BIT(0) 56 #define CDNS_UART_IRQ_RXTOUT BIT(8) 57 58 static vaddr_t chip_to_base(struct serial_chip *chip) 59 { 60 struct cdns_uart_data *pd = 61 container_of(chip, struct cdns_uart_data, chip); 62 63 return io_pa_or_va(&pd->base); 64 } 65 66 static void cdns_uart_flush(struct serial_chip *chip) 67 { 68 vaddr_t base = chip_to_base(chip); 69 70 while (!(read32(base + CDNS_UART_CHANNEL_STATUS) & 71 CDNS_UART_CHANNEL_STATUS_TEMPTY)) 72 ; 73 } 74 75 static bool cdns_uart_have_rx_data(struct serial_chip *chip) 76 { 77 vaddr_t base = chip_to_base(chip); 78 79 return !(read32(base + CDNS_UART_CHANNEL_STATUS) & 80 CDNS_UART_CHANNEL_STATUS_REMPTY); 81 } 82 83 static int cdns_uart_getchar(struct serial_chip *chip) 84 { 85 vaddr_t base = chip_to_base(chip); 86 87 while (!cdns_uart_have_rx_data(chip)) 88 ; 89 return read32(base + CDNS_UART_FIFO) & 0xff; 90 } 91 92 static void cdns_uart_putc(struct serial_chip *chip, int ch) 93 { 94 vaddr_t base = chip_to_base(chip); 95 96 /* Wait until there is space in the FIFO */ 97 while (read32(base + CDNS_UART_CHANNEL_STATUS) & 98 CDNS_UART_CHANNEL_STATUS_TFUL) 99 ; 100 101 /* Send the character */ 102 write32(ch, base + CDNS_UART_FIFO); 103 } 104 105 106 static const struct serial_ops cdns_uart_ops = { 107 .flush = cdns_uart_flush, 108 .getchar = cdns_uart_getchar, 109 .have_rx_data = cdns_uart_have_rx_data, 110 .putc = cdns_uart_putc, 111 }; 112 KEEP_PAGER(cdns_uart_ops); 113 114 /* 115 * we rely on the bootloader having set up the HW correctly, we just enable 116 * transmitter/receiver here, just in case. 117 */ 118 void cdns_uart_init(struct cdns_uart_data *pd, paddr_t base, uint32_t uart_clk, 119 uint32_t baud_rate) 120 { 121 pd->base.pa = base; 122 pd->chip.ops = &cdns_uart_ops; 123 124 if (!uart_clk || !baud_rate) 125 return; 126 127 /* Enable UART and RX/TX */ 128 write32(CDNS_UART_CONTROL_RXEN | CDNS_UART_CONTROL_TXEN, 129 base + CDNS_UART_CONTROL); 130 131 cdns_uart_flush(&pd->chip); 132 } 133