1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (C) 2002-2021 Xilinx, Inc. All rights reserved. 4 * Copyright (c) 2022 Foundries.io Ltd. (jorge@foundries.io) 5 * Copyright (c) 2024-2025, Advanced Micro Devices, Inc. All rights reserved. 6 * 7 */ 8 9 #ifndef __GPIO_PRIVATE_H__ 10 #define __GPIO_PRIVATE_H__ 11 12 #include <drivers/gpio.h> 13 #include <kernel/dt.h> 14 #include <stdlib.h> 15 #include <tee_api_types.h> 16 #include <util.h> 17 18 #define GPIO_MAX_BANK 6 19 20 #define PS_BANK_MAX 4 21 22 #define GPIO_NUM_MAX 16 23 24 #define GPIO_UPPER_MASK GENMASK_32(31, 16) 25 26 #define DATA_LSW_OFFSET(__bank) (0x000 + 0x8 * (__bank)) 27 #define DATA_MSW_OFFSET(__bank) (0x004 + 0x8 * (__bank)) 28 #define DATA_RO_OFFSET(__bank) (0x060 + 0x4 * (__bank)) 29 #define DIRM_OFFSET(__bank) (0x204 + 0x40 * (__bank)) 30 #define OUTEN_OFFSET(__bank) (0x208 + 0x40 * (__bank)) 31 #define INTMASK_OFFSET(__bank) (0x20c + 0x40 * (__bank)) 32 #define INTEN_OFFSET(__bank) (0x210 + 0x40 * (__bank)) 33 #define INTDIS_OFFSET(__bank) (0x214 + 0x40 * (__bank)) 34 35 struct amd_gbank_data { 36 const char *label; 37 uint16_t ngpio; 38 uint32_t max_bank; 39 uint32_t bank_min[GPIO_MAX_BANK]; 40 uint32_t bank_max[GPIO_MAX_BANK]; 41 }; 42 43 struct amd_gpio_info { 44 struct amd_gbank_data *bdata; 45 struct gpio_chip chip; 46 vaddr_t vbase; 47 }; 48 49 void amd_gpio_get_bank_and_pin(struct amd_gbank_data *bdata, uint32_t gpio, 50 uint32_t *bank, uint32_t *pin); 51 TEE_Result amd_gpio_get_dt(struct dt_pargs *pargs, void *data, 52 struct gpio **out_gpio); 53 54 #endif /* __GPIO_PRIVATE_H__ */ 55