xref: /optee_os/core/arch/riscv/plat-virt/main.c (revision 25675979615c01f3c6bfbe105f53e07e939dd739)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright 2022-2023 NXP
4  */
5 
6 #include <console.h>
7 #include <drivers/ns16550.h>
8 #include <drivers/plic.h>
9 #include <kernel/boot.h>
10 #include <kernel/tee_common_otp.h>
11 #include <platform_config.h>
12 
13 static struct ns16550_data console_data __nex_bss;
14 
15 register_ddr(DRAM_BASE, DRAM_SIZE);
16 
17 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, UART0_BASE,
18 			CORE_MMU_PGDIR_SIZE);
19 
20 #ifdef CFG_RISCV_PLIC
21 void boot_primary_init_intc(void)
22 {
23 	plic_init(PLIC_BASE);
24 }
25 
26 void boot_secondary_init_intc(void)
27 {
28 	plic_hart_init();
29 }
30 #endif /* CFG_RISCV_PLIC */
31 
32 void plat_console_init(void)
33 {
34 	ns16550_init(&console_data, UART0_BASE, IO_WIDTH_U8, 0);
35 	register_serial_console(&console_data.chip);
36 }
37 
38 void interrupt_main_handler(void)
39 {
40 	if (IS_ENABLED(CFG_RISCV_PLIC))
41 		plic_it_handle();
42 }
43