xref: /optee_os/core/arch/riscv/plat-spike/platform_config.h (revision 7b76de3dc3b0c49260b118ed2ad05de8944620d2)
1 /* SPDX-License-Identifier: BSD-2-Clause */
2 /*
3  * Copyright 2022 NXP
4  *
5  * Brief   Spike platform configuration.
6  */
7 
8 #ifndef PLATFORM_CONFIG_H
9 #define PLATFORM_CONFIG_H
10 
11 #include <mm/generic_ram_layout.h>
12 #include <riscv.h>
13 
14 #ifndef HTIF_BASE
15 #define HTIF_BASE	0x40008000
16 #endif
17 
18 /* CLINT */
19 #ifndef CLINT_BASE
20 #define CLINT_BASE	0x02000000
21 #endif
22 
23 #define PLAT_THREAD_EXCP_FOREIGN_INTR	(CSR_XIE_EIE)
24 #define PLAT_THREAD_EXCP_NATIVE_INTR	(CSR_XIE_SIE | CSR_XIE_TIE)
25 
26 #endif
27