xref: /optee_os/core/arch/riscv/include/sbi.h (revision 5d5d7d0b1c038a6836be9f0b38585f5aa6a4dd01)
1 /* SPDX-License-Identifier: BSD-2-Clause */
2 /*
3  * Copyright 2022 NXP
4  */
5 
6 #ifndef __SBI_H
7 #define __SBI_H
8 
9 #if defined(CFG_RISCV_SBI)
10 
11 /* SBI return error codes */
12 #define SBI_SUCCESS			 0
13 #define SBI_ERR_FAILURE			-1
14 #define SBI_ERR_NOT_SUPPORTED		-2
15 #define SBI_ERR_INVALID_PARAM		-3
16 #define SBI_ERR_DENIED			-4
17 #define SBI_ERR_INVALID_ADDRESS		-5
18 #define SBI_ERR_ALREADY_AVAILABLE	-6
19 #define SBI_ERR_ALREADY_STARTED		-7
20 #define SBI_ERR_ALREADY_STOPPED		-8
21 
22 /* SBI Extension IDs */
23 #define SBI_EXT_0_1_CONSOLE_PUTCHAR	0x01
24 #define SBI_EXT_BASE			0x10
25 #define SBI_EXT_HSM			0x48534D
26 #define SBI_EXT_DBCN			0x4442434E
27 #define SBI_EXT_TEE			0x544545
28 
29 #ifndef __ASSEMBLER__
30 
31 /* SBI function IDs for Base extension */
32 enum sbi_ext_base_fid {
33 	SBI_EXT_BASE_GET_SPEC_VERSION = 0,
34 	SBI_EXT_BASE_GET_IMP_ID,
35 	SBI_EXT_BASE_GET_IMP_VERSION,
36 	SBI_EXT_BASE_PROBE_EXT,
37 	SBI_EXT_BASE_GET_MVENDORID,
38 	SBI_EXT_BASE_GET_MARCHID,
39 	SBI_EXT_BASE_GET_MIMPID,
40 };
41 
42 /* SBI function IDs for HSM extension */
43 enum sbi_ext_hsm_fid {
44 	SBI_EXT_HSM_HART_START = 0,
45 	SBI_EXT_HSM_HART_STOP,
46 	SBI_EXT_HSM_HART_GET_STATUS,
47 	SBI_EXT_HSM_HART_SUSPEND,
48 };
49 
50 /* SBI function IDs for Debug Console extension */
51 enum sbi_ext_dbcn_fid {
52 	SBI_EXT_DBCN_CONSOLE_WRITE = 0,
53 	SBI_EXT_DBCN_CONSOLE_READ = 1,
54 	SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
55 };
56 
57 enum sbi_hsm_hart_state {
58 	SBI_HSM_STATE_STARTED = 0,
59 	SBI_HSM_STATE_STOPPED,
60 	SBI_HSM_STATE_START_PENDING,
61 	SBI_HSM_STATE_STOP_PENDING,
62 	SBI_HSM_STATE_SUSPENDED,
63 	SBI_HSM_STATE_SUSPEND_PENDING,
64 	SBI_HSM_STATE_RESUME_PENDING,
65 };
66 
67 #include <compiler.h>
68 #include <encoding.h>
69 #include <stdint.h>
70 #include <sys/cdefs.h>
71 #include <types_ext.h>
72 #include <util.h>
73 
74 int sbi_probe_extension(int extid);
75 void sbi_console_putchar(int ch);
76 int sbi_dbcn_write_byte(unsigned char ch);
77 int sbi_hsm_hart_start(uint32_t hartid, paddr_t start_addr, unsigned long arg);
78 int sbi_hsm_hart_get_status(uint32_t hartid, enum sbi_hsm_hart_state *status);
79 
80 #endif /*__ASSEMBLER__*/
81 #endif /*defined(CFG_RISCV_SBI)*/
82 #endif /*__SBI_H*/
83