1 /* 2 * Copyright (c) 2014, STMicroelectronics International N.V. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 #include <platform_config.h> 28 29 #include <sm/sm.h> 30 #include <sm/teesmc.h> 31 #include <sm/teesmc_opteed_macros.h> 32 #include <sm/teesmc_opteed.h> 33 34 #include <arm.h> 35 36 #include <kernel/misc.h> 37 38 #include "sm_private.h" 39 40 static struct sm_nsec_ctx sm_nsec_ctx[CFG_TEE_CORE_NB_CORE]; 41 static struct sm_sec_ctx sm_sec_ctx[CFG_TEE_CORE_NB_CORE]; 42 43 /* 44 * Has to match layout of thread_vector_table. Some of the entries are 45 * never used. 46 * 47 * We're using this layout to be able to used the same vector when this 48 * secure monitor is used and when the secure monitor in ARM Trusted 49 * Firmware is used. 50 */ 51 static struct { 52 uint32_t std_smc_entry; 53 uint32_t fast_smc_entry; 54 uint32_t cpu_on_entry; 55 uint32_t cpu_off_entry; 56 uint32_t cpu_resume_entry; 57 uint32_t cpu_suspend_entry; 58 uint32_t fiq_entry; 59 uint32_t system_off_entry; 60 uint32_t system_reset_entry; 61 } *sm_entry_vector; 62 63 struct sm_nsec_ctx *sm_get_nsec_ctx(void) 64 { 65 return &sm_nsec_ctx[get_core_pos()]; 66 } 67 68 struct sm_sec_ctx *sm_get_sec_ctx(void) 69 { 70 return &sm_sec_ctx[get_core_pos()]; 71 } 72 73 void sm_set_sec_smc_entry(const struct sm_reg_r0_to_r3 *regs) 74 { 75 struct sm_sec_ctx *sec_ctx = sm_get_sec_ctx(); 76 77 if (TEESMC_IS_FAST_CALL(regs->r0)) 78 sec_ctx->mon_lr = (uint32_t)&sm_entry_vector->fast_smc_entry; 79 else 80 sec_ctx->mon_lr = (uint32_t)&sm_entry_vector->std_smc_entry; 81 } 82 83 void sm_set_nsec_ret_vals(struct sm_reg_r0_to_r3 *regs, uint32_t r4) 84 { 85 if (regs->r0 == TEESMC_OPTEED_RETURN_FIQ_DONE) { 86 /* On FIQ exit we're restoring r0-r3 from nsec context */ 87 struct sm_nsec_ctx *nsec_ctx = sm_get_nsec_ctx(); 88 89 regs->r0 = nsec_ctx->r0; 90 regs->r1 = nsec_ctx->r1; 91 regs->r2 = nsec_ctx->r2; 92 regs->r3 = nsec_ctx->r3; 93 } else { 94 /* On all other exits we're shifting r1-r4 into r0-r3 */ 95 regs->r0 = regs->r1; 96 regs->r1 = regs->r2; 97 regs->r2 = regs->r3; 98 regs->r3 = r4; 99 } 100 } 101 102 void sm_set_sec_fiq_entry(void) 103 { 104 struct sm_sec_ctx *sec_ctx = sm_get_sec_ctx(); 105 106 sec_ctx->mon_lr = (uint32_t)&sm_entry_vector->fiq_entry; 107 } 108 109 void sm_set_entry_vector(void *entry_vector) 110 { 111 sm_entry_vector = entry_vector; 112 } 113