1/* SPDX-License-Identifier: BSD-2-Clause */ 2/* 3 * Copyright 2017 NXP 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include <arm.h> 30#include <arm32_macros.S> 31#include <asm.S> 32#include <kernel/cache_helpers.h> 33#include <kernel/unwind.h> 34 35FUNC psci_disable_smp, : 36UNWIND( .fnstart) 37 read_actlr r0 38 bic r0, r0, #ACTLR_SMP 39 write_actlr r0 40 isb 41 bx lr 42UNWIND( .fnend) 43END_FUNC psci_disable_smp 44 45FUNC psci_enable_smp, : 46UNWIND( .fnstart) 47 read_actlr r0 48 orr r0, r0, #ACTLR_SMP 49 write_actlr r0 50 isb 51 bx lr 52UNWIND( .fnend) 53END_FUNC psci_enable_smp 54 55FUNC psci_armv7_cpu_off, : 56UNWIND( .fnstart) 57 push {r12, lr} 58UNWIND( .save {r12, lr}) 59 60 mov r0, #DCACHE_OP_CLEAN_INV 61 bl dcache_op_all 62 63 /* Disable Cache */ 64 read_sctlr r0 65 bic r0, r0, #SCTLR_C 66 write_sctlr r0 67 isb 68 dsb 69 70 mov r0, #DCACHE_OP_CLEAN_INV 71 bl dcache_op_all 72 73 clrex 74 75 bl psci_disable_smp 76 77 pop {r12, pc} 78UNWIND( .fnend) 79END_FUNC psci_armv7_cpu_off 80