xref: /optee_os/core/arch/arm/sm/pm.c (revision 8e81e2f5366a971afdd2ac47fb8529d1def5feb0)
1 /*
2  * Copyright 2017 NXP
3  *
4  * Peng Fan <peng.fan@nxp.com>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright notice,
10  * this list of conditions and the following disclaimer.
11  *
12  * 2. Redistributions in binary form must reproduce the above copyright notice,
13  * this list of conditions and the following disclaimer in the documentation
14  * and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
20  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <arm32.h>
30 #include <console.h>
31 #include <drivers/imx_uart.h>
32 #include <io.h>
33 #include <kernel/cache_helpers.h>
34 #include <kernel/generic_boot.h>
35 #include <kernel/misc.h>
36 #include <kernel/panic.h>
37 #include <kernel/pm_stubs.h>
38 #include <kernel/thread.h>
39 #include <kernel/tlb_helpers.h>
40 #include <kernel/tz_ssvce_pl310.h>
41 #include <mm/core_memprot.h>
42 #include <mm/core_mmu.h>
43 #include <platform_config.h>
44 #include <sm/optee_smc.h>
45 #include <sm/pm.h>
46 #include <sm/psci.h>
47 #include <sm/sm.h>
48 #include <stdint.h>
49 
50 #if CFG_TEE_CORE_NB_CORE > 4
51 #error "Max support 4 cores in one cluster now"
52 #endif
53 
54 void sm_pm_cpu_suspend_save(struct sm_pm_ctx *ctx, uint32_t sp)
55 {
56 	struct thread_core_local *p = thread_get_core_local();
57 
58 	p->sm_pm_ctx_phys = virt_to_phys((void *)ctx);
59 
60 	/* The content will be passed to sm_pm_cpu_do_resume as register sp */
61 	ctx->sp = sp;
62 	ctx->cpu_resume_addr =
63 		virt_to_phys((void *)(vaddr_t)sm_pm_cpu_do_resume);
64 
65 	sm_pm_cpu_do_suspend(ctx->suspend_regs);
66 
67 	dcache_op_level1(DCACHE_OP_CLEAN_INV);
68 
69 #ifdef CFG_PL310
70 	arm_cl2_cleanbyway(core_mmu_get_va(PL310_BASE, MEM_AREA_IO_SEC));
71 #endif
72 }
73