1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright 2017 NXP 4 * 5 * Peng Fan <peng.fan@nxp.com> 6 */ 7 8 #include <arm32.h> 9 #include <console.h> 10 #include <drivers/imx_uart.h> 11 #include <io.h> 12 #include <kernel/cache_helpers.h> 13 #include <kernel/generic_boot.h> 14 #include <kernel/misc.h> 15 #include <kernel/panic.h> 16 #include <kernel/pm_stubs.h> 17 #include <kernel/thread.h> 18 #include <kernel/tlb_helpers.h> 19 #include <kernel/tz_ssvce_pl310.h> 20 #include <mm/core_memprot.h> 21 #include <mm/core_mmu.h> 22 #include <platform_config.h> 23 #include <sm/optee_smc.h> 24 #include <sm/pm.h> 25 #include <sm/psci.h> 26 #include <sm/sm.h> 27 #include <stdint.h> 28 29 #if CFG_TEE_CORE_NB_CORE > 4 30 #error "Max support 4 cores in one cluster now" 31 #endif 32 33 void sm_pm_cpu_suspend_save(struct sm_pm_ctx *ctx, uint32_t sp) 34 { 35 struct thread_core_local *p = thread_get_core_local(); 36 37 p->sm_pm_ctx_phys = virt_to_phys((void *)ctx); 38 39 /* The content will be passed to sm_pm_cpu_do_resume as register sp */ 40 ctx->sp = sp; 41 ctx->cpu_resume_addr = 42 virt_to_phys((void *)(vaddr_t)sm_pm_cpu_do_resume); 43 44 sm_pm_cpu_do_suspend(ctx->suspend_regs); 45 46 dcache_op_level1(DCACHE_OP_CLEAN_INV); 47 48 #ifdef CFG_PL310 49 arm_cl2_cleanbyway(core_mmu_get_va(PL310_BASE, MEM_AREA_IO_SEC)); 50 #endif 51 } 52