1PLATFORM_FLAVOR ?= zcu102 2 3include core/arch/arm/cpu/cortex-armv8-0.mk 4 5$(call force,CFG_TEE_CORE_NB_CORE,4) 6$(call force,CFG_CDNS_UART,y) 7$(call force,CFG_GIC,y) 8$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 9$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 10 11# Disable core ASLR for two reasons: 12# 1. There is no source for ALSR seed, as ATF does not provide a 13# DTB to OP-TEE. Hardware RNG is also not currently supported. 14# 2. OP-TEE does not boot with enabled CFG_CORE_ASLR. 15$(call force,CFG_CORE_ASLR,n) 16 17ifeq ($(CFG_ARM64_core),y) 18$(call force,CFG_WITH_LPAE,y) 19else 20$(call force,CFG_ARM32_core,y) 21endif 22 23CFG_TZDRAM_START ?= 0x60000000 24CFG_TZDRAM_SIZE ?= 0x10000000 25CFG_SHMEM_START ?= 0x70000000 26CFG_SHMEM_SIZE ?= 0x10000000 27 28CFG_WITH_STATS ?= y 29CFG_CRYPTO_WITH_CE ?= y 30