xref: /optee_os/core/arch/arm/plat-vexpress/main.c (revision c994cb415ba6b9ed3905854badb5866d86b1ea05)
1 /*
2  * Copyright (c) 2014, STMicroelectronics International N.V.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  * this list of conditions and the following disclaimer.
10  *
11  * 2. Redistributions in binary form must reproduce the above copyright notice,
12  * this list of conditions and the following disclaimer in the documentation
13  * and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
19  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <platform_config.h>
29 
30 #include <stdint.h>
31 #include <string.h>
32 
33 #include <drivers/gic.h>
34 #include <drivers/pl011.h>
35 
36 #include <arm.h>
37 #include <kernel/generic_boot.h>
38 #include <kernel/pm_stubs.h>
39 #include <trace.h>
40 #include <kernel/misc.h>
41 #include <kernel/tee_time.h>
42 #include <mm/tee_pager.h>
43 #include <tee/entry.h>
44 #include <tee/arch_svc.h>
45 #include <console.h>
46 
47 static void main_fiq(void);
48 
49 static const struct thread_handlers handlers = {
50 	.std_smc = tee_entry,
51 	.fast_smc = tee_entry,
52 	.fiq = main_fiq,
53 	.svc = tee_svc_handler,
54 	.abort = tee_pager_abort_handler,
55 #if defined(CFG_WITH_ARM_TRUSTED_FW)
56 	.cpu_on = cpu_on_handler,
57 	.cpu_off = pm_do_nothing,
58 	.cpu_suspend = pm_do_nothing,
59 	.cpu_resume = pm_do_nothing,
60 	.system_off = pm_do_nothing,
61 	.system_reset = pm_do_nothing,
62 #else
63 	.cpu_on = pm_panic,
64 	.cpu_off = pm_panic,
65 	.cpu_suspend = pm_panic,
66 	.cpu_resume = pm_panic,
67 	.system_off = pm_panic,
68 	.system_reset = pm_panic,
69 #endif
70 };
71 
72 const struct thread_handlers *generic_boot_get_handlers(void)
73 {
74 	return &handlers;
75 }
76 
77 #if PLATFORM_FLAVOR_IS(fvp) || PLATFORM_FLAVOR_IS(juno)
78 void main_init_gic(void)
79 {
80 	/*
81 	 * On ARMv8, GIC configuration is initialized in ARM-TF,
82 	 */
83 	gic_init_base_addr(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET);
84 	gic_it_add(IT_CONSOLE_UART);
85 	/* Route FIQ to primary CPU */
86 	gic_it_set_cpu_mask(IT_CONSOLE_UART, gic_it_get_target(0));
87 	gic_it_set_prio(IT_CONSOLE_UART, 0x1);
88 	gic_it_enable(IT_CONSOLE_UART);
89 
90 }
91 #elif PLATFORM_FLAVOR_IS(qemu)
92 void main_init_gic(void)
93 {
94 	/* Initialize GIC */
95 	gic_init(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET);
96 	gic_it_add(IT_CONSOLE_UART);
97 	gic_it_set_cpu_mask(IT_CONSOLE_UART, 0x1);
98 	gic_it_set_prio(IT_CONSOLE_UART, 0xff);
99 	gic_it_enable(IT_CONSOLE_UART);
100 }
101 #elif PLATFORM_FLAVOR_IS(qemu_virt)
102 void main_init_gic(void)
103 {
104 	/* Initialize GIC */
105 	gic_init(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET);
106 }
107 #endif
108 
109 static void main_fiq(void)
110 {
111 	uint32_t iar;
112 
113 	DMSG("enter");
114 
115 	iar = gic_read_iar();
116 
117 	while (pl011_have_rx_data(CONSOLE_UART_BASE)) {
118 		DMSG("cpu %zu: got 0x%x",
119 		     get_core_pos(), pl011_getchar(CONSOLE_UART_BASE));
120 	}
121 
122 	gic_write_eoir(iar);
123 
124 	DMSG("return");
125 }
126 
127 void console_init(void)
128 {
129 	pl011_init(CONSOLE_UART_BASE,
130 		   CONSOLE_UART_CLK_IN_HZ,
131 		   CONSOLE_BAUDRATE);
132 }
133 
134 void console_putc(int ch)
135 {
136 	pl011_putc(ch, CONSOLE_UART_BASE);
137 	if (ch == '\n')
138 		pl011_putc('\r', CONSOLE_UART_BASE);
139 }
140 
141 void console_flush(void)
142 {
143 	pl011_flush(CONSOLE_UART_BASE);
144 }
145