xref: /optee_os/core/arch/arm/plat-vexpress/main.c (revision 9403c583381528e7fb391e3769644cc9653cfbb6)
1 /*
2  * Copyright (c) 2014, STMicroelectronics International N.V.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  * this list of conditions and the following disclaimer.
10  *
11  * 2. Redistributions in binary form must reproduce the above copyright notice,
12  * this list of conditions and the following disclaimer in the documentation
13  * and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
19  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <platform_config.h>
29 
30 #include <stdint.h>
31 #include <string.h>
32 
33 #include <drivers/gic.h>
34 #include <drivers/pl011.h>
35 
36 #include <arm.h>
37 #include <kernel/generic_boot.h>
38 #include <kernel/pm_stubs.h>
39 #include <trace.h>
40 #include <kernel/misc.h>
41 #include <kernel/tee_time.h>
42 #include <mm/tee_pager.h>
43 #include <tee/entry_fast.h>
44 #include <tee/entry_std.h>
45 #include <tee/arch_svc.h>
46 #include <console.h>
47 
48 static void main_fiq(void);
49 
50 static const struct thread_handlers handlers = {
51 	.std_smc = tee_entry_std,
52 	.fast_smc = tee_entry_fast,
53 	.fiq = main_fiq,
54 	.svc = tee_svc_handler,
55 	.abort = tee_pager_abort_handler,
56 #if defined(CFG_WITH_ARM_TRUSTED_FW)
57 	.cpu_on = cpu_on_handler,
58 	.cpu_off = pm_do_nothing,
59 	.cpu_suspend = pm_do_nothing,
60 	.cpu_resume = pm_do_nothing,
61 	.system_off = pm_do_nothing,
62 	.system_reset = pm_do_nothing,
63 #else
64 	.cpu_on = pm_panic,
65 	.cpu_off = pm_panic,
66 	.cpu_suspend = pm_panic,
67 	.cpu_resume = pm_panic,
68 	.system_off = pm_panic,
69 	.system_reset = pm_panic,
70 #endif
71 };
72 
73 const struct thread_handlers *generic_boot_get_handlers(void)
74 {
75 	return &handlers;
76 }
77 
78 #if PLATFORM_FLAVOR_IS(fvp) || PLATFORM_FLAVOR_IS(juno)
79 void main_init_gic(void)
80 {
81 	/*
82 	 * On ARMv8, GIC configuration is initialized in ARM-TF,
83 	 */
84 	gic_init_base_addr(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET);
85 	gic_it_add(IT_CONSOLE_UART);
86 	/* Route FIQ to primary CPU */
87 	gic_it_set_cpu_mask(IT_CONSOLE_UART, gic_it_get_target(0));
88 	gic_it_set_prio(IT_CONSOLE_UART, 0x1);
89 	gic_it_enable(IT_CONSOLE_UART);
90 
91 }
92 #elif PLATFORM_FLAVOR_IS(qemu)
93 void main_init_gic(void)
94 {
95 	/* Initialize GIC */
96 	gic_init(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET);
97 	gic_it_add(IT_CONSOLE_UART);
98 	gic_it_set_cpu_mask(IT_CONSOLE_UART, 0x1);
99 	gic_it_set_prio(IT_CONSOLE_UART, 0xff);
100 	gic_it_enable(IT_CONSOLE_UART);
101 }
102 #elif PLATFORM_FLAVOR_IS(qemu_virt)
103 void main_init_gic(void)
104 {
105 	/* Initialize GIC */
106 	gic_init(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET);
107 	gic_it_add(IT_CONSOLE_UART);
108 	gic_it_set_cpu_mask(IT_CONSOLE_UART, 0x1);
109 	gic_it_set_prio(IT_CONSOLE_UART, 0x1);
110 	gic_it_enable(IT_CONSOLE_UART);
111 }
112 #endif
113 
114 static void main_fiq(void)
115 {
116 	uint32_t iar;
117 
118 	DMSG("enter");
119 
120 	iar = gic_read_iar();
121 
122 	while (pl011_have_rx_data(CONSOLE_UART_BASE)) {
123 		int ch __unused = pl011_getchar(CONSOLE_UART_BASE);
124 
125 		DMSG("cpu %zu: got 0x%x", get_core_pos(), ch);
126 	}
127 
128 	gic_write_eoir(iar);
129 
130 	DMSG("return");
131 }
132 
133 void console_init(void)
134 {
135 	pl011_init(CONSOLE_UART_BASE,
136 		   CONSOLE_UART_CLK_IN_HZ,
137 		   CONSOLE_BAUDRATE);
138 }
139 
140 void console_putc(int ch)
141 {
142 	pl011_putc(ch, CONSOLE_UART_BASE);
143 	if (ch == '\n')
144 		pl011_putc('\r', CONSOLE_UART_BASE);
145 }
146 
147 void console_flush(void)
148 {
149 	pl011_flush(CONSOLE_UART_BASE);
150 }
151