1 /* 2 * Copyright (c) 2016, Linaro Limited 3 * Copyright (c) 2014, STMicroelectronics International N.V. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <platform_config.h> 30 31 #include <stdint.h> 32 #include <string.h> 33 34 #include <drivers/gic.h> 35 #include <drivers/pl011.h> 36 37 #include <arm.h> 38 #include <kernel/generic_boot.h> 39 #include <kernel/pm_stubs.h> 40 #include <trace.h> 41 #include <kernel/misc.h> 42 #include <kernel/tee_time.h> 43 #include <tee/entry_fast.h> 44 #include <tee/entry_std.h> 45 #include <console.h> 46 #include <keep.h> 47 #include <initcall.h> 48 49 static void main_fiq(void); 50 51 static const struct thread_handlers handlers = { 52 .std_smc = tee_entry_std, 53 .fast_smc = tee_entry_fast, 54 .fiq = main_fiq, 55 #if defined(CFG_WITH_ARM_TRUSTED_FW) 56 .cpu_on = cpu_on_handler, 57 .cpu_off = pm_do_nothing, 58 .cpu_suspend = pm_do_nothing, 59 .cpu_resume = pm_do_nothing, 60 .system_off = pm_do_nothing, 61 .system_reset = pm_do_nothing, 62 #else 63 .cpu_on = pm_panic, 64 .cpu_off = pm_panic, 65 .cpu_suspend = pm_panic, 66 .cpu_resume = pm_panic, 67 .system_off = pm_panic, 68 .system_reset = pm_panic, 69 #endif 70 }; 71 72 static struct gic_data gic_data; 73 74 const struct thread_handlers *generic_boot_get_handlers(void) 75 { 76 return &handlers; 77 } 78 79 #ifdef GIC_BASE 80 void main_init_gic(void) 81 { 82 #if PLATFORM_FLAVOR_IS(fvp) || PLATFORM_FLAVOR_IS(juno) || \ 83 PLATFORM_FLAVOR_IS(qemu_armv8a) 84 /* On ARMv8, GIC configuration is initialized in ARM-TF */ 85 gic_init_base_addr(&gic_data, GIC_BASE + GICC_OFFSET, 86 GIC_BASE + GICD_OFFSET); 87 #else 88 /* Initialize GIC */ 89 gic_init(&gic_data, GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET); 90 #endif 91 itr_init(&gic_data.chip); 92 } 93 #endif 94 95 static void main_fiq(void) 96 { 97 gic_it_handle(&gic_data); 98 } 99 100 void console_init(void) 101 { 102 pl011_init(CONSOLE_UART_BASE, 103 CONSOLE_UART_CLK_IN_HZ, 104 CONSOLE_BAUDRATE); 105 } 106 107 void console_putc(int ch) 108 { 109 pl011_putc(ch, CONSOLE_UART_BASE); 110 if (ch == '\n') 111 pl011_putc('\r', CONSOLE_UART_BASE); 112 } 113 114 void console_flush(void) 115 { 116 pl011_flush(CONSOLE_UART_BASE); 117 } 118 119 #ifdef IT_CONSOLE_UART 120 static enum itr_return console_itr_cb(struct itr_handler *h __unused) 121 { 122 while (pl011_have_rx_data(CONSOLE_UART_BASE)) { 123 int ch __maybe_unused = pl011_getchar(CONSOLE_UART_BASE); 124 125 DMSG("cpu %zu: got 0x%x", get_core_pos(), ch); 126 } 127 return ITRR_HANDLED; 128 } 129 130 static struct itr_handler console_itr = { 131 .it = IT_CONSOLE_UART, 132 .flags = ITRF_TRIGGER_LEVEL, 133 .handler = console_itr_cb, 134 }; 135 KEEP_PAGER(console_itr); 136 137 static TEE_Result init_console_itr(void) 138 { 139 itr_add(&console_itr); 140 itr_enable(&console_itr); 141 return TEE_SUCCESS; 142 } 143 driver_init(init_console_itr); 144 #endif 145