1PLATFORM_FLAVOR ?= qemu_virt 2 3ifeq ($(PLATFORM_FLAVOR),qemu_virt) 4include core/arch/arm/cpu/cortex-a15.mk 5endif 6ifeq ($(PLATFORM_FLAVOR),fvp) 7include core/arch/arm/cpu/cortex-armv8-0.mk 8platform-debugger-arm := 1 9endif 10ifeq ($(PLATFORM_FLAVOR),juno) 11include core/arch/arm/cpu/cortex-armv8-0.mk 12platform-debugger-arm := 1 13# Workaround 808870: Unconditional VLDM instructions might cause an 14# alignment fault even though the address is aligned 15# Either hard float must be disabled for AArch32 or strict alignment checks 16# must be disabled 17ifeq ($(CFG_SCTLR_ALIGNMENT_CHECK),y) 18$(call force,CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT,y) 19else 20$(call force,CFG_SCTLR_ALIGNMENT_CHECK,n) 21endif 22endif #juno 23ifeq ($(PLATFORM_FLAVOR),qemu_armv8a) 24include core/arch/arm/cpu/cortex-armv8-0.mk 25CFG_ARM64_core ?= y 26endif 27 28 29ifeq ($(platform-debugger-arm),1) 30# ARM debugger needs this 31platform-cflags-debug-info = -gdwarf-2 32platform-aflags-debug-info = -gdwarf-2 33endif 34 35ifeq ($(platform-flavor-armv8),1) 36$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 37endif 38 39$(call force,CFG_GIC,y) 40$(call force,CFG_PL011,y) 41$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 42 43ifeq ($(CFG_CORE_TPM_EVENT_LOG),y) 44# NOTE: Below values for the TPM event log are implementation 45# dependent and used mostly for debugging purposes. 46# Care must be taken to properly configure them if used. 47CFG_TPM_LOG_BASE_ADDR ?= 0x402c951 48CFG_TPM_MAX_LOG_SIZE ?= 0x200 49endif 50 51ifeq ($(CFG_ARM64_core),y) 52$(call force,CFG_WITH_LPAE,y) 53else 54$(call force,CFG_ARM32_core,y) 55endif 56 57CFG_WITH_STATS ?= y 58 59ifeq ($(PLATFORM_FLAVOR),fvp) 60CFG_TEE_CORE_NB_CORE = 8 61CFG_TZDRAM_START ?= 0x06000000 62CFG_TZDRAM_SIZE ?= 0x02000000 63CFG_SHMEM_START ?= 0x83000000 64CFG_SHMEM_SIZE ?= 0x00200000 65# DRAM1 is defined above 4G 66$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 67$(call force,CFG_CORE_ARM64_PA_BITS,36) 68endif 69 70ifeq ($(PLATFORM_FLAVOR),juno) 71CFG_TEE_CORE_NB_CORE = 6 72CFG_TZDRAM_START ?= 0xff000000 73CFG_TZDRAM_SIZE ?= 0x00ff8000 74CFG_SHMEM_START ?= 0xfee00000 75CFG_SHMEM_SIZE ?= 0x00200000 76# DRAM1 is defined above 4G 77$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 78$(call force,CFG_CORE_ARM64_PA_BITS,36) 79CFG_CRYPTO_WITH_CE ?= y 80endif 81 82ifeq ($(PLATFORM_FLAVOR),qemu_virt) 83CFG_TEE_CORE_NB_CORE = 4 84# [0e00.0000 0e0f.ffff] is reserved to early boot 85CFG_TZDRAM_START ?= 0x0e100000 86CFG_TZDRAM_SIZE ?= 0x00f00000 87CFG_SHMEM_START ?= 0x7fe00000 88CFG_SHMEM_SIZE ?= 0x00200000 89# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory. 90CFG_TEE_SDP_MEM_SIZE ?= 0x00400000 91# Set VA space to 2MB for Kasan offset to match LPAE and 32bit MMU configs 92CFG_TEE_RAM_VA_SIZE ?= 0x00200000 93ifeq ($(CFG_CORE_SANITIZE_KADDRESS),y) 94# CFG_ASAN_SHADOW_OFFSET is calculated as: 95# (&__asan_shadow_start - (TEE_RAM_VA_START / 8) 96# This is unfortunately currently not possible to do in make so we have to 97# calculate it offline, there's some asserts in 98# core/arch/arm/kernel/generic_boot.c to check that we got it right 99CFG_ASAN_SHADOW_OFFSET = 0xc6a71c0 100endif 101$(call force,CFG_BOOT_SECONDARY_REQUEST,y) 102$(call force,CFG_PSCI_ARM32,y) 103$(call force,CFG_DT,y) 104CFG_DTB_MAX_SIZE ?= 0x100000 105endif 106 107ifeq ($(PLATFORM_FLAVOR),qemu_armv8a) 108CFG_TEE_CORE_NB_CORE = 4 109# [0e00.0000 0e0f.ffff] is reserved to early boot 110CFG_TZDRAM_START ?= 0x0e100000 111CFG_TZDRAM_SIZE ?= 0x00f00000 112# SHM chosen arbitrary, in a way that it does not interfere 113# with initial location of linux kernel, dtb and initrd. 114CFG_SHMEM_START ?= 0x42000000 115CFG_SHMEM_SIZE ?= 0x00200000 116# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory. 117CFG_TEE_SDP_MEM_SIZE ?= 0x00400000 118$(call force,CFG_DT,y) 119CFG_DTB_MAX_SIZE ?= 0x100000 120endif 121