xref: /optee_os/core/arch/arm/plat-vexpress/conf.mk (revision b8bb0afa738e6038bbd92b57742aa2526df9f20a)
1PLATFORM_FLAVOR ?= qemu_virt
2
3ifeq ($(PLATFORM_FLAVOR),qemu_virt)
4include core/arch/arm/cpu/cortex-a15.mk
5endif
6ifeq ($(PLATFORM_FLAVOR),fvp)
7include core/arch/arm/cpu/cortex-armv8-0.mk
8platform-debugger-arm := 1
9endif
10ifeq ($(PLATFORM_FLAVOR),juno)
11include core/arch/arm/cpu/cortex-armv8-0.mk
12platform-debugger-arm := 1
13# Workaround 808870: Unconditional VLDM instructions might cause an
14# alignment fault even though the address is aligned
15$(call force,CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT,y)
16endif
17ifeq ($(PLATFORM_FLAVOR),qemu_armv8a)
18include core/arch/arm/cpu/cortex-armv8-0.mk
19endif
20
21
22ifeq ($(platform-debugger-arm),1)
23# ARM debugger needs this
24platform-cflags-debug-info = -gdwarf-2
25platform-aflags-debug-info = -gdwarf-2
26endif
27
28ifeq ($(platform-flavor-armv8),1)
29$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
30endif
31
32$(call force,CFG_GENERIC_BOOT,y)
33$(call force,CFG_GIC,y)
34$(call force,CFG_PL011,y)
35$(call force,CFG_PM_STUBS,y)
36$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
37
38ta-targets = ta_arm32
39
40ifeq ($(CFG_ARM64_core),y)
41$(call force,CFG_WITH_LPAE,y)
42ta-targets += ta_arm64
43else
44$(call force,CFG_ARM32_core,y)
45endif
46
47CFG_WITH_STACK_CANARIES ?= y
48CFG_WITH_STATS ?= y
49
50ifeq ($(PLATFORM_FLAVOR),fvp)
51CFG_TEE_CORE_NB_CORE = 8
52CFG_TZDRAM_START ?= 0x06000000
53CFG_TZDRAM_SIZE  ?= 0x02000000
54CFG_SHMEM_START  ?= 0x83000000
55CFG_SHMEM_SIZE   ?= 0x00200000
56# DRAM1 is defined above 4G
57$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
58endif
59
60ifeq ($(PLATFORM_FLAVOR),juno)
61CFG_TEE_CORE_NB_CORE = 6
62CFG_TZDRAM_START ?= 0xff000000
63CFG_TZDRAM_SIZE  ?= 0x00ff8000
64CFG_SHMEM_START  ?= 0xfee00000
65CFG_SHMEM_SIZE   ?= 0x00200000
66# DRAM1 is defined above 4G
67$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
68CFG_CRYPTO_WITH_CE ?= y
69endif
70
71ifeq ($(PLATFORM_FLAVOR),qemu_virt)
72CFG_TEE_CORE_NB_CORE = 4
73# [0e00.0000 0e0f.ffff] is reserved to early boot
74CFG_TZDRAM_START ?= 0x0e100000
75CFG_TZDRAM_SIZE  ?= 0x00f00000
76CFG_SHMEM_START  ?= 0x7fe00000
77CFG_SHMEM_SIZE   ?= 0x00200000
78# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory.
79CFG_TEE_SDP_MEM_SIZE ?= 0x00400000
80# Set VA space to 2MB for Kasan offset to match LPAE and 32bit MMU configs
81CFG_TEE_RAM_VA_SIZE ?= 0x00200000
82ifeq ($(CFG_CORE_SANITIZE_KADDRESS),y)
83# CFG_ASAN_SHADOW_OFFSET is calculated as:
84# (&__asan_shadow_start - (TEE_RAM_VA_START / 8)
85# This is unfortunately currently not possible to do in make so we have to
86# calculate it offline, there's some asserts in
87# core/arch/arm/kernel/generic_boot.c to check that we got it right
88CFG_ASAN_SHADOW_OFFSET = 0xc6a71c0
89endif
90$(call force,CFG_BOOT_SECONDARY_REQUEST,y)
91$(call force,CFG_PSCI_ARM32,y)
92$(call force,CFG_DT,y)
93CFG_DTB_MAX_SIZE ?= 0x100000
94endif
95
96ifeq ($(PLATFORM_FLAVOR),qemu_armv8a)
97CFG_TEE_CORE_NB_CORE = 4
98# [0e00.0000 0e0f.ffff] is reserved to early boot
99CFG_TZDRAM_START ?= 0x0e100000
100CFG_TZDRAM_SIZE  ?= 0x00f00000
101# SHM chosen arbitrary, in a way that it does not interfere
102# with initial location of linux kernel, dtb and initrd.
103CFG_SHMEM_START ?= 0x42000000
104CFG_SHMEM_SIZE  ?= 0x00200000
105# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory.
106CFG_TEE_SDP_MEM_SIZE ?= 0x00400000
107$(call force,CFG_DT,y)
108CFG_DTB_MAX_SIZE ?= 0x100000
109endif
110