xref: /optee_os/core/arch/arm/plat-vexpress/conf.mk (revision 3f6ed0a62ed0264f05743f692202e7fc1b98d6c7)
1PLATFORM_FLAVOR ?= qemu_virt
2
3ifeq ($(PLATFORM_FLAVOR),qemu_virt)
4include core/arch/arm/cpu/cortex-a15.mk
5endif
6ifeq ($(PLATFORM_FLAVOR),fvp)
7include core/arch/arm/cpu/cortex-armv8-0.mk
8platform-debugger-arm := 1
9endif
10ifeq ($(PLATFORM_FLAVOR),juno)
11include core/arch/arm/cpu/cortex-armv8-0.mk
12platform-debugger-arm := 1
13# Workaround 808870: Unconditional VLDM instructions might cause an
14# alignment fault even though the address is aligned
15# Either hard float must be disabled for AArch32 or strict alignment checks
16# must be disabled
17ifeq ($(CFG_SCTLR_ALIGNMENT_CHECK),y)
18$(call force,CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT,y)
19else
20$(call force,CFG_SCTLR_ALIGNMENT_CHECK,n)
21endif
22endif #juno
23ifeq ($(PLATFORM_FLAVOR),qemu_armv8a)
24include core/arch/arm/cpu/cortex-armv8-0.mk
25CFG_ARM64_core ?= y
26supported-ta-targets ?= ta_arm64 ta_arm32
27endif
28
29
30ifeq ($(platform-debugger-arm),1)
31# ARM debugger needs this
32platform-cflags-debug-info = -gdwarf-2
33platform-aflags-debug-info = -gdwarf-2
34endif
35
36ifeq ($(platform-flavor-armv8),1)
37$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
38endif
39
40$(call force,CFG_PL011,y)
41$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
42
43ifeq ($(CFG_CORE_TPM_EVENT_LOG),y)
44# NOTE: Below values for the TPM event log are implementation
45# dependent and used mostly for debugging purposes.
46# Care must be taken to properly configure them if used.
47CFG_TPM_LOG_BASE_ADDR ?= 0x402c951
48CFG_TPM_MAX_LOG_SIZE ?= 0x200
49endif
50
51ifneq ($(CFG_ARM64_core),y)
52$(call force,CFG_ARM32_core,y)
53endif
54
55CFG_WITH_STATS ?= y
56CFG_ENABLE_EMBEDDED_TESTS ?= y
57
58ifeq ($(CFG_CORE_SEL2_SPMC),y)
59$(call force,CFG_CORE_RESERVED_SHM,n)
60CFG_GIC ?= n
61else
62$(call force,CFG_GIC,y)
63endif
64
65ifeq ($(PLATFORM_FLAVOR),fvp)
66CFG_TEE_CORE_NB_CORE = 8
67ifeq ($(CFG_CORE_SEL2_SPMC),y)
68CFG_TZDRAM_START ?= 0x06281000
69CFG_TZDRAM_SIZE  ?= 0x01D80000
70else
71CFG_TZDRAM_START ?= 0x06000000
72CFG_TZDRAM_SIZE  ?= 0x02000000
73endif
74CFG_SHMEM_START  ?= 0x83000000
75CFG_SHMEM_SIZE   ?= 0x00200000
76# DRAM1 is defined above 4G
77$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
78$(call force,CFG_CORE_ARM64_PA_BITS,36)
79ifeq ($(CFG_SCMI_SCPFW),y)
80$(call force,CFG_SCMI_SCPFW_PRODUCT,optee-fvp)
81endif
82endif
83
84ifeq ($(PLATFORM_FLAVOR),juno)
85CFG_TEE_CORE_NB_CORE = 6
86CFG_TZDRAM_START ?= 0xff000000
87CFG_TZDRAM_SIZE  ?= 0x00ff8000
88CFG_SHMEM_START  ?= 0xfee00000
89CFG_SHMEM_SIZE   ?= 0x00200000
90# DRAM1 is defined above 4G
91$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
92$(call force,CFG_CORE_ARM64_PA_BITS,36)
93CFG_CRYPTO_WITH_CE ?= y
94CFG_ARM_SMCCC_TRNG ?= y
95CFG_WITH_SOFTWARE_PRNG ?= n
96endif
97
98ifeq ($(PLATFORM_FLAVOR),qemu_virt)
99CFG_TEE_CORE_NB_CORE = 4
100# [0e00.0000 0e0f.ffff] is reserved to early boot
101CFG_TZDRAM_START ?= 0x0e100000
102CFG_TZDRAM_SIZE  ?= 0x00f00000
103CFG_SHMEM_START  ?= 0x7fe00000
104CFG_SHMEM_SIZE   ?= 0x00200000
105# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory.
106CFG_TEE_SDP_MEM_SIZE ?= 0x00400000
107# Set VA space to 2MB for Kasan offset to match LPAE and 32bit MMU configs
108CFG_TEE_RAM_VA_SIZE ?= 0x00200000
109ifeq ($(CFG_CORE_SANITIZE_KADDRESS),y)
110# CFG_ASAN_SHADOW_OFFSET is calculated as:
111# (&__asan_shadow_start - (TEE_RAM_VA_START / 8)
112# This is unfortunately currently not possible to do in make so we have to
113# calculate it offline, there's some asserts in
114# core/arch/arm/kernel/generic_boot.c to check that we got it right
115CFG_ASAN_SHADOW_OFFSET = 0xc6a71c0
116endif
117$(call force,CFG_BOOT_SECONDARY_REQUEST,y)
118$(call force,CFG_PSCI_ARM32,y)
119$(call force,CFG_DT,y)
120CFG_DTB_MAX_SIZE ?= 0x100000
121CFG_CORE_ASYNC_NOTIF ?= y
122CFG_CORE_ASYNC_NOTIF_GIC_INTID ?= 219
123endif
124
125ifeq ($(PLATFORM_FLAVOR),qemu_armv8a)
126CFG_TEE_CORE_NB_CORE = 4
127ifneq ($(CFG_CORE_SEL2_SPMC),y)
128# [0e00.0000 0e0f.ffff] is reserved to early boot
129CFG_TZDRAM_START ?= 0x0e100000
130CFG_TZDRAM_SIZE  ?= 0x00f00000
131# SHM chosen arbitrary, in a way that it does not interfere
132# with initial location of linux kernel, dtb and initrd.
133CFG_SHMEM_START ?= 0x42000000
134CFG_SHMEM_SIZE  ?= 0x00200000
135# When Secure Data Path is enable, last MByte of TZDRAM is SDP test memory.
136CFG_TEE_SDP_MEM_SIZE ?= 0x00400000
137endif
138$(call force,CFG_DT,y)
139CFG_DTB_MAX_SIZE ?= 0x100000
140ifeq ($(CFG_SCMI_SCPFW),y)
141$(call force,CFG_SCMI_SCPFW_PRODUCT,optee-fvp)
142endif
143endif
144
145ifneq (,$(filter $(PLATFORM_FLAVOR),qemu_virt qemu_armv8a))
146CFG_DT_DRIVER_EMBEDDED_TEST ?= y
147ifeq ($(CFG_DT_DRIVER_EMBEDDED_TEST),y)
148$(call force,CFG_EMBED_DTB_SOURCE_FILE,embedded_dtb_test.dts,Mandated for DT tests)
149endif
150endif
151
152CFG_PKCS11_TA ?= y
153