xref: /optee_os/core/arch/arm/plat-uniphier/main.c (revision 6cfa381e534b362afbd103f526b132048e54ba47)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (c) 2015, Linaro Limited
4  * Copyright (c) 2017, Socionext Inc.
5  */
6 
7 #include <console.h>
8 #include <drivers/gic.h>
9 #include <drivers/serial8250_uart.h>
10 #include <io.h>
11 #include <kernel/boot.h>
12 #include <kernel/panic.h>
13 #include <mm/tee_pager.h>
14 #include <platform_config.h>
15 #include <stdint.h>
16 
17 register_phys_mem_pgdir(MEM_AREA_IO_SEC,
18 			ROUNDDOWN(CONSOLE_UART_BASE, CORE_MMU_PGDIR_SIZE),
19 			CORE_MMU_PGDIR_SIZE);
20 
21 register_phys_mem_pgdir(MEM_AREA_IO_SEC,
22 			ROUNDDOWN(GIC_BASE, CORE_MMU_PGDIR_SIZE),
23 			CORE_MMU_PGDIR_SIZE);
24 
25 register_phys_mem_pgdir(MEM_AREA_IO_SEC,
26 			ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_PGDIR_SIZE),
27 			CORE_MMU_PGDIR_SIZE);
28 
29 #ifdef DRAM0_BASE
30 register_ddr(DRAM0_BASE, DRAM0_SIZE);
31 #endif
32 #ifdef DRAM1_BASE
33 register_ddr(DRAM1_BASE, DRAM1_SIZE);
34 #endif
35 
36 static struct serial8250_uart_data console_data;
37 
38 void boot_primary_init_intc(void)
39 {
40 	gic_init(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET);
41 }
42 
43 void console_init(void)
44 {
45 	/* Init UART */
46 	serial8250_uart_init(&console_data, CONSOLE_UART_BASE,
47 			     CONSOLE_UART_CLK_IN_HZ, CONSOLE_BAUDRATE);
48 
49 	/* Register console */
50 	register_serial_console(&console_data.chip);
51 }
52