1 /* 2 * Copyright (c) 2017, Texas Instruments 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES// LOSS OF USE, DATA, OR PROFITS// OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <arm32.h> 29 #include <io.h> 30 #include <kernel/generic_boot.h> 31 #include <kernel/tz_ssvce_def.h> 32 #include <kernel/tz_ssvce_pl310.h> 33 #include <mm/core_memprot.h> 34 #include <platform_config.h> 35 36 register_phys_mem(MEM_AREA_IO_SEC, PL310_BASE, PL310_SIZE); 37 38 vaddr_t pl310_base(void) 39 { 40 static void *va; 41 42 if (cpu_mmu_enabled()) { 43 if (!va) 44 va = phys_to_virt(PL310_BASE, MEM_AREA_IO_SEC); 45 return (vaddr_t)va; 46 } 47 48 return PL310_BASE; 49 } 50 51 /* ROM handles initial setup for us */ 52 void arm_cl2_config(vaddr_t pl310_base) 53 { 54 (void)pl310_base; 55 } 56 57 /* We provide platform services that expect the cache to be disabled on boot */ 58 void arm_cl2_enable(vaddr_t pl310_base) 59 { 60 (void)pl310_base; 61 } 62