1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2018, Linaro Limited 4 */ 5 6 #include <arm.h> 7 #include <console.h> 8 #include <drivers/gic.h> 9 #include <drivers/pl011.h> 10 #include <io.h> 11 #include <kernel/boot.h> 12 #include <kernel/interrupt.h> 13 #include <kernel/misc.h> 14 #include <kernel/panic.h> 15 #include <kernel/thread.h> 16 #include <kernel/timer.h> 17 #include <mm/core_memprot.h> 18 #include <platform_config.h> 19 #include <sm/optee_smc.h> 20 21 #include "synquacer_rng_pta.h" 22 23 static struct gic_data gic_data; 24 static struct pl011_data console_data; 25 26 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, 27 CORE_MMU_PGDIR_SIZE); 28 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GIC_BASE, CORE_MMU_PGDIR_SIZE); 29 register_phys_mem_pgdir(MEM_AREA_IO_SEC, THERMAL_SENSOR_BASE, 30 CORE_MMU_PGDIR_SIZE); 31 32 void itr_core_handler(void) 33 { 34 gic_it_handle(&gic_data); 35 } 36 37 void console_init(void) 38 { 39 pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ, 40 CONSOLE_BAUDRATE); 41 register_serial_console(&console_data.chip); 42 } 43 44 void main_init_gic(void) 45 { 46 /* On ARMv8-A, GIC configuration is initialized in TF-A */ 47 gic_init_base_addr(&gic_data, 0, GIC_BASE + GICD_OFFSET); 48 49 itr_init(&gic_data.chip); 50 } 51 52 static enum itr_return timer_itr_cb(struct itr_handler *h __unused) 53 { 54 /* Reset timer for next FIQ */ 55 generic_timer_handler(TIMER_PERIOD_MS); 56 57 /* Collect entropy on each timer FIQ */ 58 rng_collect_entropy(); 59 60 return ITRR_HANDLED; 61 } 62 63 static struct itr_handler timer_itr = { 64 .it = IT_SEC_TIMER, 65 .flags = ITRF_TRIGGER_LEVEL, 66 .handler = timer_itr_cb, 67 }; 68 69 static TEE_Result init_timer_itr(void) 70 { 71 itr_add(&timer_itr); 72 itr_enable(IT_SEC_TIMER); 73 74 /* Enable timer FIQ to fetch entropy required during boot */ 75 generic_timer_start(TIMER_PERIOD_MS); 76 77 return TEE_SUCCESS; 78 } 79 driver_init(init_timer_itr); 80