1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2018, Linaro Limited 4 */ 5 6 #include <arm.h> 7 #include <console.h> 8 #include <drivers/gic.h> 9 #include <drivers/pl011.h> 10 #include <io.h> 11 #include <kernel/boot.h> 12 #include <kernel/interrupt.h> 13 #include <kernel/misc.h> 14 #include <kernel/panic.h> 15 #include <kernel/thread.h> 16 #include <kernel/timer.h> 17 #include <mm/core_memprot.h> 18 #include <platform_config.h> 19 #include <rng_pta.h> 20 #include <sm/optee_smc.h> 21 22 static struct gic_data gic_data; 23 static struct pl011_data console_data; 24 25 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, 26 CORE_MMU_PGDIR_SIZE); 27 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GIC_BASE, CORE_MMU_PGDIR_SIZE); 28 register_phys_mem_pgdir(MEM_AREA_IO_SEC, THERMAL_SENSOR_BASE, 29 CORE_MMU_PGDIR_SIZE); 30 31 void itr_core_handler(void) 32 { 33 gic_it_handle(&gic_data); 34 } 35 36 void console_init(void) 37 { 38 pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ, 39 CONSOLE_BAUDRATE); 40 register_serial_console(&console_data.chip); 41 } 42 43 void main_init_gic(void) 44 { 45 /* On ARMv8-A, GIC configuration is initialized in TF-A */ 46 gic_init_base_addr(&gic_data, 0, GIC_BASE + GICD_OFFSET); 47 48 itr_init(&gic_data.chip); 49 } 50 51 static enum itr_return timer_itr_cb(struct itr_handler *h __unused) 52 { 53 /* Reset timer for next FIQ */ 54 generic_timer_handler(TIMER_PERIOD_MS); 55 56 /* Collect entropy on each timer FIQ */ 57 rng_collect_entropy(); 58 59 return ITRR_HANDLED; 60 } 61 62 static struct itr_handler timer_itr = { 63 .it = IT_SEC_TIMER, 64 .flags = ITRF_TRIGGER_LEVEL, 65 .handler = timer_itr_cb, 66 }; 67 68 static TEE_Result init_timer_itr(void) 69 { 70 itr_add(&timer_itr); 71 itr_enable(IT_SEC_TIMER); 72 73 /* Enable timer FIQ to fetch entropy required during boot */ 74 generic_timer_start(TIMER_PERIOD_MS); 75 76 return TEE_SUCCESS; 77 } 78 driver_init(init_timer_itr); 79