1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2018, Linaro Limited 4 */ 5 6 #include <arm.h> 7 #include <console.h> 8 #include <drivers/gic.h> 9 #include <drivers/pl011.h> 10 #include <io.h> 11 #include <kernel/generic_boot.h> 12 #include <kernel/misc.h> 13 #include <kernel/panic.h> 14 #include <kernel/pm_stubs.h> 15 #include <kernel/thread.h> 16 #include <kernel/timer.h> 17 #include <mm/core_memprot.h> 18 #include <platform_config.h> 19 #include <sm/optee_smc.h> 20 #include <tee/entry_fast.h> 21 #include <tee/entry_std.h> 22 #include <rng_pta.h> 23 24 static void main_fiq(void); 25 26 static const struct thread_handlers handlers = { 27 .std_smc = tee_entry_std, 28 .fast_smc = tee_entry_fast, 29 .nintr = main_fiq, 30 .cpu_on = cpu_on_handler, 31 .cpu_off = pm_do_nothing, 32 .cpu_suspend = pm_do_nothing, 33 .cpu_resume = pm_do_nothing, 34 .system_off = pm_do_nothing, 35 .system_reset = pm_do_nothing, 36 }; 37 38 static struct gic_data gic_data; 39 static struct pl011_data console_data; 40 41 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, 42 CORE_MMU_PGDIR_SIZE); 43 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GIC_BASE, CORE_MMU_PGDIR_SIZE); 44 register_phys_mem_pgdir(MEM_AREA_IO_SEC, THERMAL_SENSOR_BASE, 45 CORE_MMU_PGDIR_SIZE); 46 47 const struct thread_handlers *generic_boot_get_handlers(void) 48 { 49 return &handlers; 50 } 51 52 static void main_fiq(void) 53 { 54 gic_it_handle(&gic_data); 55 } 56 57 void console_init(void) 58 { 59 pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ, 60 CONSOLE_BAUDRATE); 61 register_serial_console(&console_data.chip); 62 } 63 64 void main_init_gic(void) 65 { 66 vaddr_t gicd_base; 67 68 gicd_base = (vaddr_t)phys_to_virt(GIC_BASE + GICD_OFFSET, 69 MEM_AREA_IO_SEC); 70 71 if (!gicd_base) 72 panic(); 73 74 /* On ARMv8-A, GIC configuration is initialized in TF-A */ 75 gic_init_base_addr(&gic_data, 0, gicd_base); 76 77 itr_init(&gic_data.chip); 78 } 79 80 static enum itr_return timer_itr_cb(struct itr_handler *h __unused) 81 { 82 /* Reset timer for next FIQ */ 83 generic_timer_handler(TIMER_PERIOD_MS); 84 85 /* Collect entropy on each timer FIQ */ 86 rng_collect_entropy(); 87 88 return ITRR_HANDLED; 89 } 90 91 static struct itr_handler timer_itr = { 92 .it = IT_SEC_TIMER, 93 .flags = ITRF_TRIGGER_LEVEL, 94 .handler = timer_itr_cb, 95 }; 96 97 static TEE_Result init_timer_itr(void) 98 { 99 itr_add(&timer_itr); 100 itr_enable(IT_SEC_TIMER); 101 102 /* Enable timer FIQ to fetch entropy required during boot */ 103 generic_timer_start(TIMER_PERIOD_MS); 104 105 return TEE_SUCCESS; 106 } 107 driver_init(init_timer_itr); 108