xref: /optee_os/core/arch/arm/plat-sunxi/plat_init.S (revision 3513f961cda064f90d10f7de72af6330427a2013)
1*7f592182SYing-Chun Liu (PaulLiu)/* SPDX-License-Identifier: BSD-2-Clause */
2*7f592182SYing-Chun Liu (PaulLiu)/*
3*7f592182SYing-Chun Liu (PaulLiu) * Copyright (C) 2017, Fuzhou Rockchip Electronics Co., Ltd.
4*7f592182SYing-Chun Liu (PaulLiu) * Copyright (C) 2018, Linaro Limited
5*7f592182SYing-Chun Liu (PaulLiu) * All rights reserved.
6*7f592182SYing-Chun Liu (PaulLiu) *
7*7f592182SYing-Chun Liu (PaulLiu) * Redistribution and use in source and binary forms, with or without
8*7f592182SYing-Chun Liu (PaulLiu) * modification, are permitted provided that the following conditions are met:
9*7f592182SYing-Chun Liu (PaulLiu) *
10*7f592182SYing-Chun Liu (PaulLiu) * 1. Redistributions of source code must retain the above copyright notice,
11*7f592182SYing-Chun Liu (PaulLiu) * this list of conditions and the following disclaimer.
12*7f592182SYing-Chun Liu (PaulLiu) *
13*7f592182SYing-Chun Liu (PaulLiu) * 2. Redistributions in binary form must reproduce the above copyright notice,
14*7f592182SYing-Chun Liu (PaulLiu) * this list of conditions and the following disclaimer in the documentation
15*7f592182SYing-Chun Liu (PaulLiu) * and/or other materials provided with the distribution.
16*7f592182SYing-Chun Liu (PaulLiu) *
17*7f592182SYing-Chun Liu (PaulLiu) * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18*7f592182SYing-Chun Liu (PaulLiu) * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19*7f592182SYing-Chun Liu (PaulLiu) * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20*7f592182SYing-Chun Liu (PaulLiu) * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
21*7f592182SYing-Chun Liu (PaulLiu) * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22*7f592182SYing-Chun Liu (PaulLiu) * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23*7f592182SYing-Chun Liu (PaulLiu) * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24*7f592182SYing-Chun Liu (PaulLiu) * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25*7f592182SYing-Chun Liu (PaulLiu) * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26*7f592182SYing-Chun Liu (PaulLiu) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27*7f592182SYing-Chun Liu (PaulLiu) * POSSIBILITY OF SUCH DAMAGE.
28*7f592182SYing-Chun Liu (PaulLiu) */
29*7f592182SYing-Chun Liu (PaulLiu)
30*7f592182SYing-Chun Liu (PaulLiu)#include <asm.S>
31*7f592182SYing-Chun Liu (PaulLiu)#include <arm.h>
32*7f592182SYing-Chun Liu (PaulLiu)#include <arm32_macros.S>
33*7f592182SYing-Chun Liu (PaulLiu)
34*7f592182SYing-Chun Liu (PaulLiu)FUNC plat_cpu_reset_early , :
35*7f592182SYing-Chun Liu (PaulLiu)        /* NSACR configuration */
36*7f592182SYing-Chun Liu (PaulLiu)	read_nsacr  r0
37*7f592182SYing-Chun Liu (PaulLiu)	orr     r0, r0, #NSACR_CP10
38*7f592182SYing-Chun Liu (PaulLiu)	orr     r0, r0, #NSACR_CP11
39*7f592182SYing-Chun Liu (PaulLiu)	orr     r0, r0, #NSACR_NS_SMP
40*7f592182SYing-Chun Liu (PaulLiu)	write_nsacr r0
41*7f592182SYing-Chun Liu (PaulLiu)
42*7f592182SYing-Chun Liu (PaulLiu)	/* Enable SMP bit */
43*7f592182SYing-Chun Liu (PaulLiu)        read_actlr  r0
44*7f592182SYing-Chun Liu (PaulLiu)	orr     r0, r0, #ACTLR_SMP
45*7f592182SYing-Chun Liu (PaulLiu)	write_actlr  r0
46*7f592182SYing-Chun Liu (PaulLiu)
47*7f592182SYing-Chun Liu (PaulLiu)	bx	lr
48*7f592182SYing-Chun Liu (PaulLiu)END_FUNC plat_cpu_reset_early
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