1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * Copyright (c) 2018-2022, STMicroelectronics 4 */ 5 6 #ifndef __STM32_UTIL_H__ 7 #define __STM32_UTIL_H__ 8 9 #include <assert.h> 10 #include <drivers/clk.h> 11 #include <kernel/panic.h> 12 #include <stdbool.h> 13 #include <stdint.h> 14 #include <tee_api_types.h> 15 #include <types_ext.h> 16 17 /* SoC versioning and device ID */ 18 TEE_Result stm32mp1_dbgmcu_get_chip_dev_id(uint32_t *chip_dev_id); 19 20 /* Crypto HW support */ 21 bool stm32mp_supports_hw_cryp(void); 22 23 /* Second core support */ 24 bool stm32mp_supports_second_core(void); 25 26 /* Get device ID from SYSCFG registers */ 27 uint32_t stm32mp_syscfg_get_chip_dev_id(void); 28 29 /* 30 * OPP service support per hardware constraints 31 * @opp_id: OPP support identifier read from DT property opp-hw-support 32 * Return true if hardware supports the OPP, return false otherwise 33 */ 34 bool stm32mp_supports_cpu_opp(uint32_t opp_id); 35 36 /* Backup registers and RAM utils */ 37 vaddr_t stm32mp_bkpreg(unsigned int idx); 38 39 /* Platform util for the RCC drivers */ 40 vaddr_t stm32_rcc_base(void); 41 42 /* Platform util for the GIC */ 43 vaddr_t get_gicd_base(void); 44 45 /* Platform util for PMIC support */ 46 bool stm32mp_with_pmic(void); 47 48 /* Power management service */ 49 #ifdef CFG_PSCI_ARM32 50 void stm32mp_register_online_cpu(void); 51 #else 52 static inline void stm32mp_register_online_cpu(void) 53 { 54 } 55 #endif 56 57 /* 58 * Generic spinlock function that bypass spinlock if MMU is disabled or 59 * lock is NULL. 60 */ 61 uint32_t may_spin_lock(unsigned int *lock); 62 void may_spin_unlock(unsigned int *lock, uint32_t exceptions); 63 64 /* Helper from platform RCC clock driver */ 65 struct clk *stm32mp_rcc_clock_id_to_clk(unsigned long clock_id); 66 67 extern const struct clk_ops stm32mp1_clk_ops; 68 69 /* Return rstctrl instance related to RCC reset controller DT binding ID */ 70 struct rstctrl *stm32mp_rcc_reset_id_to_rstctrl(unsigned int binding_id); 71 72 /* 73 * Structure and API function for BSEC driver to get some platform data. 74 * 75 * @base: BSEC interface registers physical base address 76 * @upper_start: Base ID for the BSEC upper words in the platform 77 * @max_id: Max value for BSEC word ID for the platform 78 */ 79 struct stm32_bsec_static_cfg { 80 paddr_t base; 81 unsigned int upper_start; 82 unsigned int max_id; 83 }; 84 85 void stm32mp_get_bsec_static_cfg(struct stm32_bsec_static_cfg *cfg); 86 87 bool stm32mp_allow_probe_shared_device(const void *fdt, int node); 88 89 #if defined(CFG_STM32MP15) && defined(CFG_WITH_PAGER) 90 /* 91 * Return the SRAM alias physical address related to @pa when applicable or 92 * @pa if it does not relate to an SRAMx non-aliased memory address. 93 */ 94 paddr_t stm32mp1_pa_or_sram_alias_pa(paddr_t pa); 95 96 /* Return whether or not the physical address range intersec pager secure RAM */ 97 bool stm32mp1_ram_intersect_pager_ram(paddr_t base, size_t size); 98 #else 99 static inline paddr_t stm32mp1_pa_or_sram_alias_pa(paddr_t pa) 100 { 101 return pa; 102 } 103 104 static inline bool stm32mp1_ram_intersect_pager_ram(paddr_t base __unused, 105 size_t size __unused) 106 { 107 return false; 108 } 109 #endif /*CFG_STM32MP15 && CFG_WITH_PAGER*/ 110 #endif /*__STM32_UTIL_H__*/ 111