1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2019, STMicroelectronics 4 */ 5 #include <assert.h> 6 #include <compiler.h> 7 #include <drivers/scmi-msg.h> 8 #include <drivers/scmi.h> 9 #include <drivers/stm32mp1_pmic.h> 10 #include <drivers/stm32mp1_pwr.h> 11 #include <drivers/stpmic1.h> 12 #include <dt-bindings/clock/stm32mp1-clks.h> 13 #include <dt-bindings/regulator/st,stm32mp15-regulator.h> 14 #include <dt-bindings/reset/stm32mp1-resets.h> 15 #include <initcall.h> 16 #include <mm/core_memprot.h> 17 #include <mm/core_mmu.h> 18 #include <platform_config.h> 19 #include <stdint.h> 20 #include <speculation_barrier.h> 21 #include <stm32_util.h> 22 #include <string.h> 23 #include <tee_api_defines.h> 24 #include <util.h> 25 26 #define TIMEOUT_US_1MS 1000 27 28 #define SCMI_CLOCK_NAME_SIZE 16 29 #define SCMI_RD_NAME_SIZE 16 30 #define SCMI_VOLTD_NAME_SIZE 16 31 32 /* 33 * struct stm32_scmi_clk - Data for the exposed clock 34 * @clock_id: Clock identifier in RCC clock driver 35 * @name: Clock string ID exposed to agent 36 * @enabled: State of the SCMI clock 37 */ 38 struct stm32_scmi_clk { 39 unsigned long clock_id; 40 const char *name; 41 bool enabled; 42 }; 43 44 /* 45 * struct stm32_scmi_rd - Data for the exposed reset controller 46 * @reset_id: Reset identifier in RCC reset driver 47 * @name: Reset string ID exposed to agent 48 */ 49 struct stm32_scmi_rd { 50 unsigned long reset_id; 51 const char *name; 52 }; 53 54 enum voltd_device { 55 VOLTD_PWR, 56 VOLTD_PMIC, 57 }; 58 59 /* 60 * struct stm32_scmi_voltd - Data for the exposed voltage domains 61 * @name: Power regulator string ID exposed to agent 62 * @priv_id: Internal string ID for the regulator 63 * @priv_dev: Internal ID for the device implementing the regulator 64 */ 65 struct stm32_scmi_voltd { 66 const char *name; 67 const char *priv_id; 68 enum voltd_device priv_dev; 69 70 }; 71 72 /* Locate all non-secure SMT message buffers in last page of SYSRAM */ 73 #define SMT_BUFFER_BASE CFG_STM32MP1_SCMI_SHM_BASE 74 #define SMT_BUFFER0_BASE SMT_BUFFER_BASE 75 #define SMT_BUFFER1_BASE (SMT_BUFFER_BASE + 0x200) 76 77 #if (SMT_BUFFER1_BASE + SMT_BUF_SLOT_SIZE > \ 78 CFG_STM32MP1_SCMI_SHM_BASE + CFG_STM32MP1_SCMI_SHM_SIZE) 79 #error "SCMI shared memory mismatch" 80 #endif 81 82 register_phys_mem(MEM_AREA_IO_NSEC, CFG_STM32MP1_SCMI_SHM_BASE, 83 CFG_STM32MP1_SCMI_SHM_SIZE); 84 85 static struct scmi_msg_channel scmi_channel[] = { 86 [0] = { 87 .agent_name = "stm32mp1-agent-0", 88 .shm_addr = { .pa = SMT_BUFFER0_BASE, }, 89 .shm_size = SMT_BUF_SLOT_SIZE, 90 }, 91 [1] = { 92 .agent_name = "stm32mp1-agent-1", 93 .shm_addr = { .pa = SMT_BUFFER1_BASE, }, 94 .shm_size = SMT_BUF_SLOT_SIZE, 95 }, 96 }; 97 98 struct scmi_msg_channel *plat_scmi_get_channel(unsigned int agent_id) 99 { 100 assert(agent_id < ARRAY_SIZE(scmi_channel)); 101 102 return &scmi_channel[agent_id]; 103 } 104 105 #define CLOCK_CELL(_scmi_id, _id, _name, _init_enabled) \ 106 [_scmi_id] = { \ 107 .clock_id = _id, \ 108 .name = _name, \ 109 .enabled = _init_enabled, \ 110 } 111 112 static struct stm32_scmi_clk stm32_scmi0_clock[] = { 113 CLOCK_CELL(CK_SCMI0_HSE, CK_HSE, "ck_hse", true), 114 CLOCK_CELL(CK_SCMI0_HSI, CK_HSI, "ck_hsi", true), 115 CLOCK_CELL(CK_SCMI0_CSI, CK_CSI, "ck_csi", true), 116 CLOCK_CELL(CK_SCMI0_LSE, CK_LSE, "ck_lse", true), 117 CLOCK_CELL(CK_SCMI0_LSI, CK_LSI, "ck_lsi", true), 118 CLOCK_CELL(CK_SCMI0_PLL2_Q, PLL2_Q, "pll2_q", true), 119 CLOCK_CELL(CK_SCMI0_PLL2_R, PLL2_R, "pll2_r", true), 120 CLOCK_CELL(CK_SCMI0_MPU, CK_MPU, "ck_mpu", true), 121 CLOCK_CELL(CK_SCMI0_AXI, CK_AXI, "ck_axi", true), 122 CLOCK_CELL(CK_SCMI0_BSEC, BSEC, "bsec", true), 123 CLOCK_CELL(CK_SCMI0_CRYP1, CRYP1, "cryp1", false), 124 CLOCK_CELL(CK_SCMI0_GPIOZ, GPIOZ, "gpioz", false), 125 CLOCK_CELL(CK_SCMI0_HASH1, HASH1, "hash1", false), 126 CLOCK_CELL(CK_SCMI0_I2C4, I2C4_K, "i2c4_k", false), 127 CLOCK_CELL(CK_SCMI0_I2C6, I2C6_K, "i2c6_k", false), 128 CLOCK_CELL(CK_SCMI0_IWDG1, IWDG1, "iwdg1", false), 129 CLOCK_CELL(CK_SCMI0_RNG1, RNG1_K, "rng1_k", true), 130 CLOCK_CELL(CK_SCMI0_RTC, RTC, "ck_rtc", true), 131 CLOCK_CELL(CK_SCMI0_RTCAPB, RTCAPB, "rtcapb", true), 132 CLOCK_CELL(CK_SCMI0_SPI6, SPI6_K, "spi6_k", false), 133 CLOCK_CELL(CK_SCMI0_USART1, USART1_K, "usart1_k", false), 134 }; 135 136 static struct stm32_scmi_clk stm32_scmi1_clock[] = { 137 CLOCK_CELL(CK_SCMI1_PLL3_Q, PLL3_Q, "pll3_q", true), 138 CLOCK_CELL(CK_SCMI1_PLL3_R, PLL3_R, "pll3_r", true), 139 CLOCK_CELL(CK_SCMI1_MCU, CK_MCU, "ck_mcu", false), 140 }; 141 142 #define RESET_CELL(_scmi_id, _id, _name) \ 143 [_scmi_id] = { \ 144 .reset_id = _id, \ 145 .name = _name, \ 146 } 147 148 static struct stm32_scmi_rd stm32_scmi0_reset_domain[] = { 149 RESET_CELL(RST_SCMI0_SPI6, SPI6_R, "spi6"), 150 RESET_CELL(RST_SCMI0_I2C4, I2C4_R, "i2c4"), 151 RESET_CELL(RST_SCMI0_I2C6, I2C6_R, "i2c6"), 152 RESET_CELL(RST_SCMI0_USART1, USART1_R, "usart1"), 153 RESET_CELL(RST_SCMI0_STGEN, STGEN_R, "stgen"), 154 RESET_CELL(RST_SCMI0_GPIOZ, GPIOZ_R, "gpioz"), 155 RESET_CELL(RST_SCMI0_CRYP1, CRYP1_R, "cryp1"), 156 RESET_CELL(RST_SCMI0_HASH1, HASH1_R, "hash1"), 157 RESET_CELL(RST_SCMI0_RNG1, RNG1_R, "rng1"), 158 RESET_CELL(RST_SCMI0_MDMA, MDMA_R, "mdma"), 159 RESET_CELL(RST_SCMI0_MCU, MCU_R, "mcu"), 160 RESET_CELL(RST_SCMI0_MCU_HOLD_BOOT, MCU_HOLD_BOOT_R, "mcu_hold_boot"), 161 }; 162 163 #define VOLTD_CELL(_scmi_id, _dev_id, _priv_id, _name) \ 164 [_scmi_id] = { \ 165 .priv_id = (_priv_id), \ 166 .priv_dev = (_dev_id), \ 167 .name = (_name), \ 168 } 169 170 #define PWR_REG11_NAME_ID "0" 171 #define PWR_REG18_NAME_ID "1" 172 #define PWR_USB33_NAME_ID "2" 173 174 struct stm32_scmi_voltd scmi0_voltage_domain[] = { 175 VOLTD_CELL(VOLTD_SCMI0_REG11, VOLTD_PWR, PWR_REG11_NAME_ID, "reg11"), 176 VOLTD_CELL(VOLTD_SCMI0_REG18, VOLTD_PWR, PWR_REG18_NAME_ID, "reg18"), 177 VOLTD_CELL(VOLTD_SCMI0_USB33, VOLTD_PWR, PWR_USB33_NAME_ID, "usb33"), 178 }; 179 180 struct scmi_agent_resources { 181 struct stm32_scmi_clk *clock; 182 size_t clock_count; 183 struct stm32_scmi_rd *rd; 184 size_t rd_count; 185 struct stm32_scmi_voltd *voltd; 186 size_t voltd_count; 187 }; 188 189 static const struct scmi_agent_resources agent_resources[] = { 190 [0] = { 191 .clock = stm32_scmi0_clock, 192 .clock_count = ARRAY_SIZE(stm32_scmi0_clock), 193 .rd = stm32_scmi0_reset_domain, 194 .rd_count = ARRAY_SIZE(stm32_scmi0_reset_domain), 195 .voltd = scmi0_voltage_domain, 196 .voltd_count = ARRAY_SIZE(scmi0_voltage_domain), 197 }, 198 [1] = { 199 .clock = stm32_scmi1_clock, 200 .clock_count = ARRAY_SIZE(stm32_scmi1_clock), 201 }, 202 }; 203 204 static const struct scmi_agent_resources *find_resource(unsigned int agent_id) 205 { 206 assert(agent_id < ARRAY_SIZE(agent_resources)); 207 208 return &agent_resources[agent_id]; 209 } 210 211 static size_t __maybe_unused plat_scmi_protocol_count_paranoid(void) 212 { 213 unsigned int n = 0; 214 unsigned int count = 0; 215 const size_t agent_count = ARRAY_SIZE(agent_resources); 216 217 for (n = 0; n < agent_count; n++) 218 if (agent_resources[n].clock_count) 219 break; 220 if (n < agent_count) 221 count++; 222 223 for (n = 0; n < agent_count; n++) 224 if (agent_resources[n].rd_count) 225 break; 226 if (n < agent_count) 227 count++; 228 229 for (n = 0; n < agent_count; n++) 230 if (agent_resources[n].voltd_count) 231 break; 232 if (n < agent_count) 233 count++; 234 235 return count; 236 } 237 238 static const char vendor[] = "ST"; 239 static const char sub_vendor[] = ""; 240 241 const char *plat_scmi_vendor_name(void) 242 { 243 return vendor; 244 } 245 246 const char *plat_scmi_sub_vendor_name(void) 247 { 248 return sub_vendor; 249 } 250 251 /* Currently supporting Clocks and Reset Domains */ 252 static const uint8_t plat_protocol_list[] = { 253 SCMI_PROTOCOL_ID_CLOCK, 254 SCMI_PROTOCOL_ID_RESET_DOMAIN, 255 SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN, 256 0 /* Null termination */ 257 }; 258 259 size_t plat_scmi_protocol_count(void) 260 { 261 const size_t count = ARRAY_SIZE(plat_protocol_list) - 1; 262 263 assert(count == plat_scmi_protocol_count_paranoid()); 264 265 return count; 266 } 267 268 const uint8_t *plat_scmi_protocol_list(unsigned int agent_id __unused) 269 { 270 assert(plat_scmi_protocol_count_paranoid() == 271 (ARRAY_SIZE(plat_protocol_list) - 1)); 272 273 return plat_protocol_list; 274 } 275 276 /* 277 * Platform SCMI clocks 278 */ 279 static struct stm32_scmi_clk *find_clock(unsigned int agent_id, 280 unsigned int scmi_id) 281 { 282 const struct scmi_agent_resources *resource = find_resource(agent_id); 283 size_t n = 0; 284 285 if (resource) { 286 for (n = 0; n < resource->clock_count; n++) 287 if (n == scmi_id) 288 return &resource->clock[n]; 289 } 290 291 return NULL; 292 } 293 294 size_t plat_scmi_clock_count(unsigned int agent_id) 295 { 296 const struct scmi_agent_resources *resource = find_resource(agent_id); 297 298 if (!resource) 299 return 0; 300 301 return resource->clock_count; 302 } 303 304 const char *plat_scmi_clock_get_name(unsigned int agent_id, 305 unsigned int scmi_id) 306 { 307 struct stm32_scmi_clk *clock = find_clock(agent_id, scmi_id); 308 309 if (!clock || !stm32mp_nsec_can_access_clock(clock->clock_id)) 310 return NULL; 311 312 return clock->name; 313 } 314 315 int32_t plat_scmi_clock_rates_array(unsigned int agent_id, unsigned int scmi_id, 316 size_t start_index, unsigned long *array, 317 size_t *nb_elts) 318 { 319 struct stm32_scmi_clk *clock = find_clock(agent_id, scmi_id); 320 321 if (!clock) 322 return SCMI_NOT_FOUND; 323 324 if (!stm32mp_nsec_can_access_clock(clock->clock_id)) 325 return SCMI_DENIED; 326 327 /* Exposed clocks are currently fixed rate clocks */ 328 if (start_index) 329 return SCMI_INVALID_PARAMETERS; 330 331 if (!array) 332 *nb_elts = 1; 333 else if (*nb_elts == 1) 334 *array = stm32_clock_get_rate(clock->clock_id); 335 else 336 return SCMI_GENERIC_ERROR; 337 338 return SCMI_SUCCESS; 339 } 340 341 unsigned long plat_scmi_clock_get_rate(unsigned int agent_id, 342 unsigned int scmi_id) 343 { 344 struct stm32_scmi_clk *clock = find_clock(agent_id, scmi_id); 345 346 if (!clock || !stm32mp_nsec_can_access_clock(clock->clock_id)) 347 return 0; 348 349 return stm32_clock_get_rate(clock->clock_id); 350 } 351 352 int32_t plat_scmi_clock_get_state(unsigned int agent_id, unsigned int scmi_id) 353 { 354 struct stm32_scmi_clk *clock = find_clock(agent_id, scmi_id); 355 356 if (!clock || !stm32mp_nsec_can_access_clock(clock->clock_id)) 357 return 0; 358 359 return (int32_t)clock->enabled; 360 } 361 362 int32_t plat_scmi_clock_set_state(unsigned int agent_id, unsigned int scmi_id, 363 bool enable_not_disable) 364 { 365 struct stm32_scmi_clk *clock = find_clock(agent_id, scmi_id); 366 367 if (!clock) 368 return SCMI_NOT_FOUND; 369 370 if (!stm32mp_nsec_can_access_clock(clock->clock_id)) 371 return SCMI_DENIED; 372 373 if (enable_not_disable) { 374 if (!clock->enabled) { 375 DMSG("SCMI clock %u enable", scmi_id); 376 stm32_clock_enable(clock->clock_id); 377 clock->enabled = true; 378 } 379 } else { 380 if (clock->enabled) { 381 DMSG("SCMI clock %u disable", scmi_id); 382 stm32_clock_disable(clock->clock_id); 383 clock->enabled = false; 384 } 385 } 386 387 return SCMI_SUCCESS; 388 } 389 390 /* 391 * Platform SCMI reset domains 392 */ 393 static struct stm32_scmi_rd *find_rd(unsigned int agent_id, 394 unsigned int scmi_id) 395 { 396 const struct scmi_agent_resources *resource = find_resource(agent_id); 397 size_t n = 0; 398 399 if (resource) { 400 for (n = 0; n < resource->rd_count; n++) 401 if (n == scmi_id) 402 return &resource->rd[n]; 403 } 404 405 return NULL; 406 } 407 408 const char *plat_scmi_rd_get_name(unsigned int agent_id, unsigned int scmi_id) 409 { 410 const struct stm32_scmi_rd *rd = find_rd(agent_id, scmi_id); 411 412 if (!rd) 413 return NULL; 414 415 return rd->name; 416 } 417 418 size_t plat_scmi_rd_count(unsigned int agent_id) 419 { 420 const struct scmi_agent_resources *resource = find_resource(agent_id); 421 422 if (!resource) 423 return 0; 424 425 return resource->rd_count; 426 } 427 428 int32_t plat_scmi_rd_autonomous(unsigned int agent_id, unsigned int scmi_id, 429 uint32_t state) 430 { 431 const struct stm32_scmi_rd *rd = find_rd(agent_id, scmi_id); 432 433 if (!rd) 434 return SCMI_NOT_FOUND; 435 436 if (!stm32mp_nsec_can_access_reset(rd->reset_id)) 437 return SCMI_DENIED; 438 439 if (rd->reset_id == MCU_HOLD_BOOT_R) 440 return SCMI_NOT_SUPPORTED; 441 442 /* Supports only reset with context loss */ 443 if (state) 444 return SCMI_NOT_SUPPORTED; 445 446 DMSG("SCMI reset %u cycle", scmi_id); 447 448 if (stm32_reset_assert(rd->reset_id, TIMEOUT_US_1MS)) 449 return SCMI_HARDWARE_ERROR; 450 451 if (stm32_reset_deassert(rd->reset_id, TIMEOUT_US_1MS)) 452 return SCMI_HARDWARE_ERROR; 453 454 return SCMI_SUCCESS; 455 } 456 457 int32_t plat_scmi_rd_set_state(unsigned int agent_id, unsigned int scmi_id, 458 bool assert_not_deassert) 459 { 460 const struct stm32_scmi_rd *rd = find_rd(agent_id, scmi_id); 461 462 if (!rd) 463 return SCMI_NOT_FOUND; 464 465 if (!stm32mp_nsec_can_access_reset(rd->reset_id)) 466 return SCMI_DENIED; 467 468 if (rd->reset_id == MCU_HOLD_BOOT_R) { 469 DMSG("SCMI MCU hold boot %s", 470 assert_not_deassert ? "set" : "release"); 471 stm32_reset_assert_deassert_mcu(assert_not_deassert); 472 return SCMI_SUCCESS; 473 } 474 475 if (assert_not_deassert) { 476 DMSG("SCMI reset %u set", scmi_id); 477 stm32_reset_set(rd->reset_id); 478 } else { 479 DMSG("SCMI reset %u release", scmi_id); 480 stm32_reset_release(rd->reset_id); 481 } 482 483 return SCMI_SUCCESS; 484 } 485 486 /* 487 * Platform SCMI voltage domains 488 */ 489 static struct stm32_scmi_voltd *find_voltd(unsigned int agent_id, 490 unsigned int scmi_id) 491 { 492 const struct scmi_agent_resources *resource = find_resource(agent_id); 493 size_t n = 0; 494 495 if (resource) { 496 for (n = 0; n < resource->voltd_count; n++) 497 if (n == scmi_id) 498 return &resource->voltd[n]; 499 } 500 501 return NULL; 502 } 503 504 size_t plat_scmi_voltd_count(unsigned int agent_id) 505 { 506 const struct scmi_agent_resources *resource = find_resource(agent_id); 507 508 if (!resource) 509 return 0; 510 511 return resource->voltd_count; 512 } 513 514 const char *plat_scmi_voltd_get_name(unsigned int agent_id, 515 unsigned int scmi_id) 516 { 517 struct stm32_scmi_voltd *voltd = find_voltd(agent_id, scmi_id); 518 519 /* Currently non-secure is allowed to access all PWR regulators */ 520 if (!voltd) 521 return NULL; 522 523 return voltd->name; 524 } 525 526 static enum pwr_regulator pwr_scmi_to_regu_id(struct stm32_scmi_voltd *voltd) 527 { 528 if (!strcmp(voltd->priv_id, PWR_REG11_NAME_ID)) 529 return PWR_REG11; 530 if (!strcmp(voltd->priv_id, PWR_REG18_NAME_ID)) 531 return PWR_REG18; 532 if (!strcmp(voltd->priv_id, PWR_USB33_NAME_ID)) 533 return PWR_USB33; 534 535 panic(); 536 } 537 538 static long pwr_get_level(struct stm32_scmi_voltd *voltd) 539 { 540 enum pwr_regulator regu_id = pwr_scmi_to_regu_id(voltd); 541 542 return (long)stm32mp1_pwr_regulator_mv(regu_id) * 1000; 543 } 544 545 static int32_t pwr_set_level(struct stm32_scmi_voltd *voltd, long level_uv) 546 { 547 if (level_uv != pwr_get_level(voltd)) 548 return SCMI_INVALID_PARAMETERS; 549 550 return SCMI_SUCCESS; 551 } 552 553 static int32_t pwr_describe_levels(struct stm32_scmi_voltd *voltd, 554 size_t start_index, long *microvolt, 555 size_t *nb_elts) 556 { 557 if (start_index) 558 return SCMI_INVALID_PARAMETERS; 559 560 if (!microvolt) { 561 *nb_elts = 1; 562 return SCMI_SUCCESS; 563 } 564 565 if (*nb_elts < 1) 566 return SCMI_GENERIC_ERROR; 567 568 *nb_elts = 1; 569 *microvolt = pwr_get_level(voltd); 570 571 return SCMI_SUCCESS; 572 } 573 574 static uint32_t pwr_get_state(struct stm32_scmi_voltd *voltd) 575 { 576 enum pwr_regulator regu_id = pwr_scmi_to_regu_id(voltd); 577 578 if (stm32mp1_pwr_regulator_is_enabled(regu_id)) 579 return SCMI_VOLTAGE_DOMAIN_CONFIG_ARCH_ON; 580 581 return SCMI_VOLTAGE_DOMAIN_CONFIG_ARCH_OFF; 582 } 583 584 static void pwr_set_state(struct stm32_scmi_voltd *voltd, bool enable) 585 { 586 enum pwr_regulator regu_id = pwr_scmi_to_regu_id(voltd); 587 588 DMSG("%sable PWR %s (was %s)", enable ? "En" : "Dis", voltd->name, 589 stm32mp1_pwr_regulator_is_enabled(regu_id) ? "on" : "off"); 590 591 stm32mp1_pwr_regulator_set_state(regu_id, enable); 592 } 593 594 static int32_t pmic_describe_levels(struct stm32_scmi_voltd *voltd, 595 size_t start_index, long *microvolt, 596 size_t *nb_elts) 597 { 598 const uint16_t *levels = NULL; 599 size_t full_count = 0; 600 size_t out_count = 0; 601 size_t i = 0; 602 603 if (!stm32mp_nsec_can_access_pmic_regu(voltd->priv_id)) 604 return SCMI_DENIED; 605 606 stpmic1_regulator_levels_mv(voltd->priv_id, &levels, &full_count); 607 608 if (!microvolt) { 609 *nb_elts = full_count - start_index; 610 return SCMI_SUCCESS; 611 } 612 613 if (SUB_OVERFLOW(full_count, start_index, &out_count)) 614 return SCMI_GENERIC_ERROR; 615 616 out_count = MIN(out_count, *nb_elts); 617 618 FMSG("%zu levels: start %zu requested %zu output %zu", 619 full_count, start_index, *nb_elts, out_count); 620 621 for (i = 0; i < out_count; i++) 622 microvolt[i] = levels[start_index + i] * 1000; 623 624 *nb_elts = out_count; 625 626 return SCMI_SUCCESS; 627 } 628 629 static long pmic_get_level(struct stm32_scmi_voltd *voltd) 630 { 631 unsigned long level_mv = 0; 632 633 if (!stm32mp_nsec_can_access_pmic_regu(voltd->priv_id)) 634 return 0; 635 636 stm32mp_get_pmic(); 637 level_mv = stpmic1_regulator_voltage_get(voltd->priv_id); 638 stm32mp_put_pmic(); 639 640 return (long)level_mv * 1000; 641 } 642 643 static int32_t pmic_set_level(struct stm32_scmi_voltd *voltd, long level_uv) 644 { 645 int rc = 0; 646 unsigned int level_mv = 0; 647 648 if (!stm32mp_nsec_can_access_pmic_regu(voltd->priv_id)) 649 return SCMI_DENIED; 650 651 if (level_uv < 0 || level_uv > (UINT16_MAX * 1000)) 652 return SCMI_INVALID_PARAMETERS; 653 654 level_mv = (unsigned int)level_uv / 1000; 655 656 DMSG("Set STPMIC1 regulator %s level to %dmV", voltd->name, level_mv); 657 658 stm32mp_get_pmic(); 659 rc = stpmic1_regulator_voltage_set(voltd->priv_id, level_mv); 660 stm32mp_put_pmic(); 661 662 return rc ? SCMI_GENERIC_ERROR : SCMI_SUCCESS; 663 } 664 665 static uint32_t pmic_get_state(struct stm32_scmi_voltd *voltd) 666 { 667 bool enabled = false; 668 669 if (!stm32mp_nsec_can_access_pmic_regu(voltd->priv_id)) 670 return SCMI_VOLTAGE_DOMAIN_CONFIG_ARCH_OFF; 671 672 stm32mp_get_pmic(); 673 enabled = stpmic1_is_regulator_enabled(voltd->priv_id); 674 stm32mp_put_pmic(); 675 676 if (enabled) 677 return SCMI_VOLTAGE_DOMAIN_CONFIG_ARCH_ON; 678 679 return SCMI_VOLTAGE_DOMAIN_CONFIG_ARCH_OFF; 680 } 681 682 static int32_t pmic_set_state(struct stm32_scmi_voltd *voltd, bool enable) 683 { 684 int rc = 0; 685 686 if (!stm32mp_nsec_can_access_pmic_regu(voltd->priv_id)) 687 return SCMI_DENIED; 688 689 stm32mp_get_pmic(); 690 691 DMSG("%sable STPMIC1 %s (was %s)", enable ? "En" : "Dis", voltd->name, 692 stpmic1_is_regulator_enabled(voltd->priv_id) ? "on" : "off"); 693 694 if (enable) 695 rc = stpmic1_regulator_enable(voltd->priv_id); 696 else 697 rc = stpmic1_regulator_disable(voltd->priv_id); 698 699 stm32mp_put_pmic(); 700 701 return rc ? SCMI_GENERIC_ERROR : SCMI_SUCCESS; 702 } 703 704 int32_t plat_scmi_voltd_levels_array(unsigned int agent_id, 705 unsigned int scmi_id, size_t start_index, 706 long *levels, size_t *nb_elts) 707 708 { 709 struct stm32_scmi_voltd *voltd = find_voltd(agent_id, scmi_id); 710 711 if (!voltd) 712 return SCMI_NOT_FOUND; 713 714 switch (voltd->priv_dev) { 715 case VOLTD_PWR: 716 return pwr_describe_levels(voltd, start_index, levels, nb_elts); 717 case VOLTD_PMIC: 718 return pmic_describe_levels(voltd, start_index, levels, 719 nb_elts); 720 default: 721 return SCMI_GENERIC_ERROR; 722 } 723 } 724 725 long plat_scmi_voltd_get_level(unsigned int agent_id, unsigned int scmi_id) 726 { 727 struct stm32_scmi_voltd *voltd = find_voltd(agent_id, scmi_id); 728 729 if (!voltd) 730 return 0; 731 732 switch (voltd->priv_dev) { 733 case VOLTD_PWR: 734 return pwr_get_level(voltd); 735 case VOLTD_PMIC: 736 return pmic_get_level(voltd); 737 default: 738 panic(); 739 } 740 } 741 742 int32_t plat_scmi_voltd_set_level(unsigned int agent_id, unsigned int scmi_id, 743 long level) 744 { 745 struct stm32_scmi_voltd *voltd = find_voltd(agent_id, scmi_id); 746 747 if (!voltd) 748 return SCMI_NOT_FOUND; 749 750 switch (voltd->priv_dev) { 751 case VOLTD_PWR: 752 return pwr_set_level(voltd, level); 753 case VOLTD_PMIC: 754 return pmic_set_level(voltd, level); 755 default: 756 return SCMI_GENERIC_ERROR; 757 } 758 } 759 760 int32_t plat_scmi_voltd_get_config(unsigned int agent_id, unsigned int scmi_id, 761 uint32_t *config) 762 { 763 struct stm32_scmi_voltd *voltd = find_voltd(agent_id, scmi_id); 764 765 if (!voltd) 766 return SCMI_NOT_FOUND; 767 768 switch (voltd->priv_dev) { 769 case VOLTD_PWR: 770 *config = pwr_get_state(voltd); 771 break; 772 case VOLTD_PMIC: 773 *config = pmic_get_state(voltd); 774 break; 775 default: 776 return SCMI_GENERIC_ERROR; 777 } 778 779 return SCMI_SUCCESS; 780 } 781 782 int32_t plat_scmi_voltd_set_config(unsigned int agent_id, unsigned int scmi_id, 783 uint32_t config) 784 { 785 struct stm32_scmi_voltd *voltd = find_voltd(agent_id, scmi_id); 786 int32_t rc = SCMI_SUCCESS; 787 788 if (!voltd) 789 return SCMI_NOT_FOUND; 790 791 switch (voltd->priv_dev) { 792 case VOLTD_PWR: 793 pwr_set_state(voltd, config); 794 break; 795 case VOLTD_PMIC: 796 rc = pmic_set_state(voltd, config); 797 break; 798 default: 799 return SCMI_GENERIC_ERROR; 800 } 801 802 return rc; 803 } 804 805 /* 806 * Initialize platform SCMI resources 807 */ 808 static TEE_Result stm32mp1_init_scmi_server(void) 809 { 810 size_t i = 0; 811 size_t j = 0; 812 813 for (i = 0; i < ARRAY_SIZE(scmi_channel); i++) { 814 struct scmi_msg_channel *chan = &scmi_channel[i]; 815 816 /* Enforce non-secure shm mapped as device memory */ 817 chan->shm_addr.va = (vaddr_t)phys_to_virt(chan->shm_addr.pa, 818 MEM_AREA_IO_NSEC); 819 assert(chan->shm_addr.va); 820 821 scmi_smt_init_agent_channel(chan); 822 } 823 824 for (i = 0; i < ARRAY_SIZE(agent_resources); i++) { 825 const struct scmi_agent_resources *res = &agent_resources[i]; 826 827 for (j = 0; j < res->clock_count; j++) { 828 struct stm32_scmi_clk *clk = &res->clock[j]; 829 830 if (!clk->name || 831 strlen(clk->name) >= SCMI_CLOCK_NAME_SIZE) 832 panic("SCMI clock name invalid"); 833 834 /* Sync SCMI clocks with their targeted initial state */ 835 if (clk->enabled && 836 stm32mp_nsec_can_access_clock(clk->clock_id)) 837 stm32_clock_enable(clk->clock_id); 838 } 839 840 for (j = 0; j < res->rd_count; j++) { 841 struct stm32_scmi_rd *rd = &res->rd[j]; 842 843 if (!rd->name || 844 strlen(rd->name) >= SCMI_RD_NAME_SIZE) 845 panic("SCMI reset domain name invalid"); 846 } 847 848 for (j = 0; j < res->voltd_count; j++) { 849 struct stm32_scmi_voltd *voltd = &res->voltd[j]; 850 851 if (!voltd->name || 852 strlen(voltd->name) >= SCMI_VOLTD_NAME_SIZE) 853 panic("SCMI voltage domain name invalid"); 854 } 855 } 856 857 return TEE_SUCCESS; 858 } 859 860 driver_init_late(stm32mp1_init_scmi_server); 861