1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2019-2022, STMicroelectronics 4 */ 5 #include <assert.h> 6 #include <compiler.h> 7 #include <confine_array_index.h> 8 #include <drivers/clk.h> 9 #include <drivers/clk_dt.h> 10 #include <drivers/regulator.h> 11 #include <drivers/rstctrl.h> 12 #include <drivers/scmi-msg.h> 13 #include <drivers/scmi.h> 14 #include <drivers/stm32_remoteproc.h> 15 #include <drivers/stm32_vrefbuf.h> 16 #include <drivers/stm32mp1_pmic.h> 17 #include <drivers/stm32mp1_pwr.h> 18 #include <drivers/stm32mp13_regulator_iod.h> 19 #include <drivers/stpmic1.h> 20 #include <drivers/stpmic1_regulator.h> 21 #include <drivers/stm32mp_dt_bindings.h> 22 #include <initcall.h> 23 #include <mm/core_memprot.h> 24 #include <mm/core_mmu.h> 25 #include <platform_config.h> 26 #include <stdint.h> 27 #include <speculation_barrier.h> 28 #include <stm32_util.h> 29 #include <string.h> 30 #include <tee_api_defines.h> 31 #include <util.h> 32 33 #define TIMEOUT_US_1MS 1000 34 35 #define SCMI_CLOCK_NAME_SIZE 16 36 #define SCMI_RD_NAME_SIZE 16 37 #define SCMI_VOLTD_NAME_SIZE 16 38 39 /* 40 * struct stm32_scmi_clk - Data for the exposed clock 41 * @clock_id: Clock identifier in RCC clock driver 42 * @name: Clock string ID exposed to channel 43 * @enabled: State of the SCMI clock 44 */ 45 struct stm32_scmi_clk { 46 unsigned long clock_id; 47 struct clk *clk; 48 const char *name; 49 bool enabled; 50 }; 51 52 /* 53 * struct stm32_scmi_rd - Data for the exposed reset controller 54 * @reset_id: Reset identifier in RCC reset driver 55 * @name: Reset string ID exposed to channel 56 * @rstctrl: Reset controller device 57 */ 58 struct stm32_scmi_rd { 59 unsigned long reset_id; 60 const char *name; 61 struct rstctrl *rstctrl; 62 }; 63 64 enum voltd_device { 65 VOLTD_PWR, 66 VOLTD_PMIC, 67 VOLTD_VREFBUF, 68 VOLTD_IOD, 69 }; 70 71 /* 72 * struct stm32_scmi_voltd - Data for the exposed voltage domains 73 * @name: Power regulator string ID exposed to channel 74 * @priv_name: Internal string ID for the PMIC regulators 75 * @priv_id: Internal ID for the regulator aside PMIC ones 76 * @priv_dev: Internal ID for the device implementing the regulator 77 * @regulator: Regulator controller device 78 * @state: State of the SCMI voltage domain (true: enable, false: disable) 79 */ 80 struct stm32_scmi_voltd { 81 const char *name; 82 const char *priv_name; 83 unsigned int priv_id; 84 enum voltd_device priv_dev; 85 struct regulator *regulator; 86 bool state; 87 }; 88 89 #if CFG_STM32MP1_SCMI_SHM_BASE 90 register_phys_mem(MEM_AREA_IO_NSEC, CFG_STM32MP1_SCMI_SHM_BASE, 91 CFG_STM32MP1_SCMI_SHM_SIZE); 92 93 /* Locate all non-secure SMT message buffers in last page of SYSRAM */ 94 #define SMT_BUFFER_BASE CFG_STM32MP1_SCMI_SHM_BASE 95 96 #if (SMT_BUFFER_BASE + SMT_BUF_SLOT_SIZE > \ 97 CFG_STM32MP1_SCMI_SHM_BASE + CFG_STM32MP1_SCMI_SHM_SIZE) 98 #error "SCMI shared memory mismatch" 99 #endif 100 #endif /*CFG_STM32MP1_SCMI_SHM_BASE*/ 101 102 #define CLOCK_CELL(_scmi_id, _id, _name, _init_enabled) \ 103 [(_scmi_id)] = { \ 104 .clock_id = (_id), \ 105 .name = (_name), \ 106 .enabled = (_init_enabled), \ 107 } 108 109 #define RESET_CELL(_scmi_id, _id, _name) \ 110 [(_scmi_id)] = { \ 111 .reset_id = (_id), \ 112 .name = (_name), \ 113 } 114 115 #define VOLTD_CELL(_scmi_id, _dev_id, _priv_id, _priv_name, _name) \ 116 [(_scmi_id)] = { \ 117 .priv_name = (_priv_name), \ 118 .priv_id = (_priv_id), \ 119 .priv_dev = (_dev_id), \ 120 .name = (_name), \ 121 } 122 123 #define VOLTD_CELL_PWR(_scmi_id, _priv_id, _name) \ 124 VOLTD_CELL((_scmi_id), VOLTD_PWR, (_priv_id), NULL, (_name)) 125 126 #define VOLTD_CELL_IOD(_scmi_id, _priv_id, _name) \ 127 VOLTD_CELL((_scmi_id), VOLTD_IOD, (_priv_id), NULL, (_name)) 128 129 #define VOLTD_CELL_VREFBUF(_scmi_id, _name) \ 130 VOLTD_CELL((_scmi_id), VOLTD_VREFBUF, 0, NULL, (_name)) 131 132 #define VOLTD_CELL_PMIC(_scmi_id, _priv_name, _name) \ 133 VOLTD_CELL((_scmi_id), VOLTD_PMIC, 0, (_priv_name), (_name)) 134 135 #ifdef CFG_STM32MP13 136 static struct stm32_scmi_clk stm32_scmi_clock[] = { 137 CLOCK_CELL(CK_SCMI_HSE, CK_HSE, "ck_hse", true), 138 CLOCK_CELL(CK_SCMI_HSI, CK_HSI, "ck_hsi", true), 139 CLOCK_CELL(CK_SCMI_CSI, CK_CSI, "ck_csi", true), 140 CLOCK_CELL(CK_SCMI_LSE, CK_LSE, "ck_lse", true), 141 CLOCK_CELL(CK_SCMI_LSI, CK_LSI, "ck_lsi", true), 142 CLOCK_CELL(CK_SCMI_HSE_DIV2, CK_HSE_DIV2, "clk-hse-div2", true), 143 CLOCK_CELL(CK_SCMI_PLL2_Q, PLL2_Q, "pll2_q", true), 144 CLOCK_CELL(CK_SCMI_PLL2_R, PLL2_R, "pll2_r", true), 145 CLOCK_CELL(CK_SCMI_PLL3_P, PLL3_P, "pll3_p", true), 146 CLOCK_CELL(CK_SCMI_PLL3_Q, PLL3_Q, "pll3_q", true), 147 CLOCK_CELL(CK_SCMI_PLL3_R, PLL3_R, "pll3_r", true), 148 CLOCK_CELL(CK_SCMI_PLL4_P, PLL4_P, "pll4_p", true), 149 CLOCK_CELL(CK_SCMI_PLL4_Q, PLL4_Q, "pll4_q", true), 150 CLOCK_CELL(CK_SCMI_PLL4_R, PLL4_R, "pll4_r", true), 151 CLOCK_CELL(CK_SCMI_MPU, CK_MPU, "ck_mpu", true), 152 CLOCK_CELL(CK_SCMI_AXI, CK_AXI, "ck_axi", true), 153 CLOCK_CELL(CK_SCMI_MLAHB, CK_MLAHB, "ck_mlahb", true), 154 CLOCK_CELL(CK_SCMI_CKPER, CK_PER, "ck_per", true), 155 CLOCK_CELL(CK_SCMI_PCLK1, PCLK1, "pclk1", true), 156 CLOCK_CELL(CK_SCMI_PCLK2, PCLK2, "pclk2", true), 157 CLOCK_CELL(CK_SCMI_PCLK3, PCLK3, "pclk3", true), 158 CLOCK_CELL(CK_SCMI_PCLK4, PCLK4, "pclk4", true), 159 CLOCK_CELL(CK_SCMI_PCLK5, PCLK5, "pclk5", true), 160 CLOCK_CELL(CK_SCMI_PCLK6, PCLK6, "pclk6", true), 161 CLOCK_CELL(CK_SCMI_CKTIMG1, CK_TIMG1, "timg1_ck", true), 162 CLOCK_CELL(CK_SCMI_CKTIMG2, CK_TIMG2, "timg2_ck", true), 163 CLOCK_CELL(CK_SCMI_CKTIMG3, CK_TIMG3, "timg3_ck", true), 164 CLOCK_CELL(CK_SCMI_RTC, RTC, "ck_rtc", true), 165 CLOCK_CELL(CK_SCMI_RTCAPB, RTCAPB, "rtcapb", true), 166 CLOCK_CELL(CK_SCMI_BSEC, BSEC, "bsec", true), 167 }; 168 #endif 169 170 #ifdef CFG_STM32MP15 171 static struct stm32_scmi_clk stm32_scmi_clock[] = { 172 CLOCK_CELL(CK_SCMI_HSE, CK_HSE, "ck_hse", true), 173 CLOCK_CELL(CK_SCMI_HSI, CK_HSI, "ck_hsi", true), 174 CLOCK_CELL(CK_SCMI_CSI, CK_CSI, "ck_csi", true), 175 CLOCK_CELL(CK_SCMI_LSE, CK_LSE, "ck_lse", true), 176 CLOCK_CELL(CK_SCMI_LSI, CK_LSI, "ck_lsi", true), 177 CLOCK_CELL(CK_SCMI_PLL2_Q, PLL2_Q, "pll2_q", true), 178 CLOCK_CELL(CK_SCMI_PLL2_R, PLL2_R, "pll2_r", true), 179 CLOCK_CELL(CK_SCMI_MPU, CK_MPU, "ck_mpu", true), 180 CLOCK_CELL(CK_SCMI_AXI, CK_AXI, "ck_axi", true), 181 CLOCK_CELL(CK_SCMI_BSEC, BSEC, "bsec", true), 182 CLOCK_CELL(CK_SCMI_CRYP1, CRYP1, "cryp1", false), 183 CLOCK_CELL(CK_SCMI_GPIOZ, GPIOZ, "gpioz", false), 184 CLOCK_CELL(CK_SCMI_HASH1, HASH1, "hash1", false), 185 CLOCK_CELL(CK_SCMI_I2C4, I2C4_K, "i2c4_k", false), 186 CLOCK_CELL(CK_SCMI_I2C6, I2C6_K, "i2c6_k", false), 187 CLOCK_CELL(CK_SCMI_IWDG1, IWDG1, "iwdg1", false), 188 CLOCK_CELL(CK_SCMI_RNG1, RNG1_K, "rng1_k", true), 189 CLOCK_CELL(CK_SCMI_RTC, RTC, "ck_rtc", true), 190 CLOCK_CELL(CK_SCMI_RTCAPB, RTCAPB, "rtcapb", true), 191 CLOCK_CELL(CK_SCMI_SPI6, SPI6_K, "spi6_k", false), 192 CLOCK_CELL(CK_SCMI_USART1, USART1_K, "usart1_k", false), 193 }; 194 #endif 195 196 #ifdef CFG_STM32MP13 197 static struct stm32_scmi_rd stm32_scmi_reset_domain[] = { 198 RESET_CELL(RST_SCMI_LTDC, LTDC_R, "ltdc"), 199 RESET_CELL(RST_SCMI_MDMA, MDMA_R, "mdma"), 200 }; 201 #endif 202 203 #ifdef CFG_STM32MP15 204 static struct stm32_scmi_rd stm32_scmi_reset_domain[] = { 205 RESET_CELL(RST_SCMI_SPI6, SPI6_R, "spi6"), 206 RESET_CELL(RST_SCMI_I2C4, I2C4_R, "i2c4"), 207 RESET_CELL(RST_SCMI_I2C6, I2C6_R, "i2c6"), 208 RESET_CELL(RST_SCMI_USART1, USART1_R, "usart1"), 209 RESET_CELL(RST_SCMI_STGEN, STGEN_R, "stgen"), 210 RESET_CELL(RST_SCMI_GPIOZ, GPIOZ_R, "gpioz"), 211 RESET_CELL(RST_SCMI_CRYP1, CRYP1_R, "cryp1"), 212 RESET_CELL(RST_SCMI_HASH1, HASH1_R, "hash1"), 213 RESET_CELL(RST_SCMI_RNG1, RNG1_R, "rng1"), 214 RESET_CELL(RST_SCMI_MDMA, MDMA_R, "mdma"), 215 RESET_CELL(RST_SCMI_MCU, MCU_R, "mcu"), 216 RESET_CELL(RST_SCMI_MCU_HOLD_BOOT, MCU_HOLD_BOOT_R, "mcu_hold_boot"), 217 }; 218 #endif 219 220 #ifdef CFG_STM32MP13 221 struct stm32_scmi_voltd scmi_voltage_domain[] = { 222 VOLTD_CELL_PWR(VOLTD_SCMI_REG11, PWR_REG11, "reg11"), 223 VOLTD_CELL_PWR(VOLTD_SCMI_REG18, PWR_REG18, "reg18"), 224 VOLTD_CELL_PWR(VOLTD_SCMI_USB33, PWR_USB33, "usb33"), 225 VOLTD_CELL_IOD(VOLTD_SCMI_SDMMC1_IO, IOD_SDMMC1, "sdmmc1"), 226 VOLTD_CELL_IOD(VOLTD_SCMI_SDMMC2_IO, IOD_SDMMC2, "sdmmc2"), 227 VOLTD_CELL_VREFBUF(VOLTD_SCMI_VREFBUF, "vrefbuf"), 228 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_BUCK1, "buck1", "buck1"), 229 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_BUCK2, "buck2", "buck2"), 230 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_BUCK3, "buck3", "buck3"), 231 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_BUCK4, "buck4", "buck4"), 232 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_LDO1, "ldo1", "ldo1"), 233 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_LDO2, "ldo2", "ldo2"), 234 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_LDO3, "ldo3", "ldo3"), 235 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_LDO4, "ldo4", "ldo4"), 236 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_LDO5, "ldo5", "ldo5"), 237 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_LDO6, "ldo6", "ldo6"), 238 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_VREFDDR, "vref_ddr", "vref_ddr"), 239 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_BOOST, "boost", "bst_out"), 240 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_PWR_SW1, "pwr_sw1", "pwr_sw1"), 241 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_PWR_SW2, "pwr_sw2", "pwr_sw2"), 242 }; 243 #endif 244 245 #ifdef CFG_STM32MP15 246 struct stm32_scmi_voltd scmi_voltage_domain[] = { 247 VOLTD_CELL_PWR(VOLTD_SCMI_REG11, PWR_REG11, "reg11"), 248 VOLTD_CELL_PWR(VOLTD_SCMI_REG18, PWR_REG18, "reg18"), 249 VOLTD_CELL_PWR(VOLTD_SCMI_USB33, PWR_USB33, "usb33"), 250 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_BUCK1, "buck1", "vddcore"), 251 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_BUCK2, "buck2", "vdd_ddr"), 252 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_BUCK3, "buck3", "vdd"), 253 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_BUCK4, "buck4", "v3v3"), 254 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_LDO1, "ldo1", "v1v8_audio"), 255 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_LDO2, "ldo2", "v3v3_hdmi"), 256 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_LDO3, "ldo3", "vtt_ddr"), 257 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_LDO4, "ldo4", "vdd_usb"), 258 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_LDO5, "ldo5", "vdda"), 259 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_LDO6, "ldo6", "v1v2_hdmi"), 260 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_VREFDDR, "vref_ddr", "vref_ddr"), 261 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_BOOST, "boost", "bst_out"), 262 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_PWR_SW1, "pwr_sw1", "vbus_otg"), 263 VOLTD_CELL_PMIC(VOLTD_SCMI_STPMIC1_PWR_SW2, "pwr_sw2", "vbus_sw"), 264 }; 265 #endif 266 267 struct channel_resources { 268 struct scmi_msg_channel *channel; 269 struct stm32_scmi_clk *clock; 270 size_t clock_count; 271 struct stm32_scmi_rd *rd; 272 size_t rd_count; 273 struct stm32_scmi_voltd *voltd; 274 size_t voltd_count; 275 }; 276 277 static const struct channel_resources scmi_channel[] = { 278 [0] = { 279 .channel = &(struct scmi_msg_channel){ 280 #ifdef SMT_BUFFER_BASE 281 .shm_addr = { .pa = SMT_BUFFER_BASE }, 282 .shm_size = SMT_BUF_SLOT_SIZE, 283 #endif 284 }, 285 .clock = stm32_scmi_clock, 286 .clock_count = ARRAY_SIZE(stm32_scmi_clock), 287 .rd = stm32_scmi_reset_domain, 288 .rd_count = ARRAY_SIZE(stm32_scmi_reset_domain), 289 .voltd = scmi_voltage_domain, 290 .voltd_count = ARRAY_SIZE(scmi_voltage_domain), 291 }, 292 }; 293 294 static const struct channel_resources *find_resource(unsigned int channel_id) 295 { 296 assert(channel_id < ARRAY_SIZE(scmi_channel)); 297 298 return scmi_channel + channel_id; 299 } 300 301 struct scmi_msg_channel *plat_scmi_get_channel(unsigned int channel_id) 302 { 303 const size_t max_id = ARRAY_SIZE(scmi_channel); 304 unsigned int confined_id = confine_array_index(channel_id, max_id); 305 306 if (channel_id >= max_id) 307 return NULL; 308 309 return find_resource(confined_id)->channel; 310 } 311 312 static size_t __maybe_unused plat_scmi_protocol_count_paranoid(void) 313 { 314 unsigned int n = 0; 315 unsigned int count = 0; 316 const size_t channel_count = ARRAY_SIZE(scmi_channel); 317 318 for (n = 0; n < channel_count; n++) 319 if (scmi_channel[n].clock_count) 320 break; 321 if (n < channel_count) 322 count++; 323 324 for (n = 0; n < channel_count; n++) 325 if (scmi_channel[n].rd_count) 326 break; 327 if (n < channel_count) 328 count++; 329 330 for (n = 0; n < channel_count; n++) 331 if (scmi_channel[n].voltd_count) 332 break; 333 if (n < channel_count) 334 count++; 335 336 return count; 337 } 338 339 static const char vendor[] = "ST"; 340 static const char sub_vendor[] = ""; 341 342 const char *plat_scmi_vendor_name(void) 343 { 344 return vendor; 345 } 346 347 const char *plat_scmi_sub_vendor_name(void) 348 { 349 return sub_vendor; 350 } 351 352 /* Currently supporting Clocks and Reset Domains */ 353 static const uint8_t plat_protocol_list[] = { 354 SCMI_PROTOCOL_ID_CLOCK, 355 SCMI_PROTOCOL_ID_RESET_DOMAIN, 356 SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN, 357 0 /* Null termination */ 358 }; 359 360 size_t plat_scmi_protocol_count(void) 361 { 362 const size_t count = ARRAY_SIZE(plat_protocol_list) - 1; 363 364 assert(count == plat_scmi_protocol_count_paranoid()); 365 366 return count; 367 } 368 369 const uint8_t *plat_scmi_protocol_list(unsigned int channel_id __unused) 370 { 371 assert(plat_scmi_protocol_count_paranoid() == 372 (ARRAY_SIZE(plat_protocol_list) - 1)); 373 374 return plat_protocol_list; 375 } 376 377 /* 378 * Platform SCMI clocks 379 */ 380 static struct stm32_scmi_clk *find_clock(unsigned int channel_id, 381 unsigned int scmi_id) 382 { 383 const struct channel_resources *resource = find_resource(channel_id); 384 size_t n = 0; 385 386 if (resource) { 387 for (n = 0; n < resource->clock_count; n++) 388 if (n == scmi_id) 389 return &resource->clock[n]; 390 } 391 392 return NULL; 393 } 394 395 size_t plat_scmi_clock_count(unsigned int channel_id) 396 { 397 const struct channel_resources *resource = find_resource(channel_id); 398 399 if (!resource) 400 return 0; 401 402 return resource->clock_count; 403 } 404 405 const char *plat_scmi_clock_get_name(unsigned int channel_id, 406 unsigned int scmi_id) 407 { 408 struct stm32_scmi_clk *clock = find_clock(channel_id, scmi_id); 409 410 if (!clock || !stm32mp_nsec_can_access_clock(clock->clock_id)) 411 return NULL; 412 413 return clock->name; 414 } 415 416 int32_t plat_scmi_clock_rates_array(unsigned int channel_id, 417 unsigned int scmi_id, size_t start_index, 418 unsigned long *array, size_t *nb_elts) 419 { 420 struct stm32_scmi_clk *clock = find_clock(channel_id, scmi_id); 421 422 if (!clock) 423 return SCMI_NOT_FOUND; 424 425 if (!stm32mp_nsec_can_access_clock(clock->clock_id)) 426 return SCMI_DENIED; 427 428 /* Exposed clocks are currently fixed rate clocks */ 429 if (start_index) 430 return SCMI_INVALID_PARAMETERS; 431 432 if (!array) 433 *nb_elts = 1; 434 else if (*nb_elts == 1) 435 *array = clk_get_rate(clock->clk); 436 else 437 return SCMI_GENERIC_ERROR; 438 439 return SCMI_SUCCESS; 440 } 441 442 unsigned long plat_scmi_clock_get_rate(unsigned int channel_id, 443 unsigned int scmi_id) 444 { 445 struct stm32_scmi_clk *clock = find_clock(channel_id, scmi_id); 446 447 if (!clock || !stm32mp_nsec_can_access_clock(clock->clock_id)) 448 return 0; 449 450 return clk_get_rate(clock->clk); 451 } 452 453 int32_t plat_scmi_clock_get_state(unsigned int channel_id, unsigned int scmi_id) 454 { 455 struct stm32_scmi_clk *clock = find_clock(channel_id, scmi_id); 456 457 if (!clock || !stm32mp_nsec_can_access_clock(clock->clock_id)) 458 return 0; 459 460 return (int32_t)clock->enabled; 461 } 462 463 int32_t plat_scmi_clock_set_state(unsigned int channel_id, unsigned int scmi_id, 464 bool enable_not_disable) 465 { 466 struct stm32_scmi_clk *clock = find_clock(channel_id, scmi_id); 467 468 if (!clock) 469 return SCMI_NOT_FOUND; 470 471 if (!stm32mp_nsec_can_access_clock(clock->clock_id)) 472 return SCMI_DENIED; 473 474 if (enable_not_disable) { 475 if (!clock->enabled) { 476 FMSG("SCMI clock %u enable", scmi_id); 477 clk_enable(clock->clk); 478 clock->enabled = true; 479 } 480 } else { 481 if (clock->enabled) { 482 FMSG("SCMI clock %u disable", scmi_id); 483 clk_disable(clock->clk); 484 clock->enabled = false; 485 } 486 } 487 488 return SCMI_SUCCESS; 489 } 490 491 /* 492 * Platform SCMI reset domains 493 */ 494 static struct stm32_scmi_rd *find_rd(unsigned int channel_id, 495 unsigned int scmi_id) 496 { 497 const struct channel_resources *resource = find_resource(channel_id); 498 size_t n = 0; 499 500 if (resource) { 501 for (n = 0; n < resource->rd_count; n++) 502 if (n == scmi_id) 503 return &resource->rd[n]; 504 } 505 506 return NULL; 507 } 508 509 const char *plat_scmi_rd_get_name(unsigned int channel_id, unsigned int scmi_id) 510 { 511 const struct stm32_scmi_rd *rd = find_rd(channel_id, scmi_id); 512 513 if (!rd) 514 return NULL; 515 516 return rd->name; 517 } 518 519 size_t plat_scmi_rd_count(unsigned int channel_id) 520 { 521 const struct channel_resources *resource = find_resource(channel_id); 522 523 if (!resource) 524 return 0; 525 526 return resource->rd_count; 527 } 528 529 int32_t plat_scmi_rd_autonomous(unsigned int channel_id, unsigned int scmi_id, 530 uint32_t state) 531 { 532 const struct stm32_scmi_rd *rd = find_rd(channel_id, scmi_id); 533 534 if (!rd) 535 return SCMI_NOT_FOUND; 536 537 if (!rd->rstctrl || !stm32mp_nsec_can_access_reset(rd->reset_id)) 538 return SCMI_DENIED; 539 540 #ifdef CFG_STM32MP15 541 /* Reset cycle on MCU hold boot is not supported */ 542 if (rd->reset_id == MCU_HOLD_BOOT_R) 543 return SCMI_NOT_SUPPORTED; 544 /* Remoteproc driver may handle all MCU reset controllers */ 545 if (rd->reset_id == MCU_R && stm32_rproc_is_secure(STM32_M4_RPROC_ID)) 546 return SCMI_DENIED; 547 #endif 548 549 /* Supports only reset with context loss */ 550 if (state) 551 return SCMI_NOT_SUPPORTED; 552 553 FMSG("SCMI reset %u cycle", scmi_id); 554 555 if (rstctrl_assert_to(rd->rstctrl, TIMEOUT_US_1MS)) 556 return SCMI_HARDWARE_ERROR; 557 558 if (rstctrl_deassert_to(rd->rstctrl, TIMEOUT_US_1MS)) 559 return SCMI_HARDWARE_ERROR; 560 561 return SCMI_SUCCESS; 562 } 563 564 int32_t plat_scmi_rd_set_state(unsigned int channel_id, unsigned int scmi_id, 565 bool assert_not_deassert) 566 { 567 const struct stm32_scmi_rd *rd = find_rd(channel_id, scmi_id); 568 TEE_Result res = TEE_ERROR_GENERIC; 569 570 if (!rd) 571 return SCMI_NOT_FOUND; 572 573 if (!rd->rstctrl || !stm32mp_nsec_can_access_reset(rd->reset_id)) 574 return SCMI_DENIED; 575 576 #ifdef CFG_STM32MP15 577 /* Remoteproc driver may handle all MCU reset controllers */ 578 if ((rd->reset_id == MCU_R || rd->reset_id == MCU_HOLD_BOOT_R) && 579 stm32_rproc_is_secure(STM32_M4_RPROC_ID)) 580 return SCMI_DENIED; 581 #endif 582 583 if (assert_not_deassert) { 584 FMSG("SCMI reset %u set", scmi_id); 585 res = rstctrl_assert(rd->rstctrl); 586 } else { 587 FMSG("SCMI reset %u release", scmi_id); 588 res = rstctrl_deassert(rd->rstctrl); 589 } 590 591 if (res) 592 return SCMI_HARDWARE_ERROR; 593 594 return SCMI_SUCCESS; 595 } 596 597 /* 598 * Platform SCMI voltage domains 599 */ 600 static struct stm32_scmi_voltd *find_voltd(unsigned int channel_id, 601 unsigned int scmi_id) 602 { 603 const struct channel_resources *resource = find_resource(channel_id); 604 size_t n = 0; 605 606 if (resource) { 607 for (n = 0; n < resource->voltd_count; n++) 608 if (n == scmi_id) 609 return &resource->voltd[n]; 610 } 611 612 return NULL; 613 } 614 615 size_t plat_scmi_voltd_count(unsigned int channel_id) 616 { 617 const struct channel_resources *resource = find_resource(channel_id); 618 619 if (!resource) 620 return 0; 621 622 return resource->voltd_count; 623 } 624 625 const char *plat_scmi_voltd_get_name(unsigned int channel_id, 626 unsigned int scmi_id) 627 { 628 struct stm32_scmi_voltd *voltd = find_voltd(channel_id, scmi_id); 629 630 /* Currently non-secure is allowed to access all PWR regulators */ 631 if (!voltd) 632 return NULL; 633 634 return voltd->name; 635 } 636 637 int32_t plat_scmi_voltd_levels_array(unsigned int channel_id, 638 unsigned int scmi_id, size_t start_index, 639 long *out_levels, size_t *nb_elts) 640 641 { 642 struct stm32_scmi_voltd *voltd = find_voltd(channel_id, scmi_id); 643 644 if (!voltd) 645 return SCMI_NOT_FOUND; 646 647 if (voltd->regulator) { 648 struct regulator_voltages_desc *desc = NULL; 649 TEE_Result res = TEE_ERROR_GENERIC; 650 const int *levels = NULL; 651 size_t n = 0; 652 653 res = regulator_supported_voltages(voltd->regulator, &desc, 654 &levels); 655 if (res == TEE_ERROR_NOT_SUPPORTED) 656 return SCMI_NOT_SUPPORTED; 657 if (res) 658 return SCMI_GENERIC_ERROR; 659 if (!desc || desc->type != VOLTAGE_TYPE_FULL_LIST) { 660 /* 661 * Triplet min/max/step description. Caller should use 662 * plat_scmi_voltd_levels_by_step(). 663 */ 664 return SCMI_NOT_SUPPORTED; 665 } 666 667 if (start_index >= desc->num_levels) 668 return SCMI_OUT_OF_RANGE; 669 670 if (!*nb_elts) { 671 *nb_elts = desc->num_levels - start_index; 672 return SCMI_SUCCESS; 673 } 674 675 *nb_elts = MIN(*nb_elts, desc->num_levels - start_index); 676 for (n = 0; n < *nb_elts; n++) 677 out_levels[n] = levels[start_index + n]; 678 679 return SCMI_SUCCESS; 680 } 681 682 return SCMI_DENIED; 683 } 684 685 int32_t plat_scmi_voltd_levels_by_step(unsigned int channel_id, 686 unsigned int scmi_id, long *min_max_step) 687 { 688 struct stm32_scmi_voltd *voltd = find_voltd(channel_id, scmi_id); 689 690 if (!voltd) 691 return SCMI_NOT_FOUND; 692 693 if (voltd->regulator) { 694 struct regulator_voltages_desc *desc = NULL; 695 TEE_Result res = TEE_ERROR_GENERIC; 696 const int *levels = NULL; 697 698 res = regulator_supported_voltages(voltd->regulator, &desc, 699 &levels); 700 if (res == TEE_ERROR_NOT_SUPPORTED) 701 return SCMI_NOT_SUPPORTED; 702 if (res) 703 return SCMI_GENERIC_ERROR; 704 if (!desc || desc->type != VOLTAGE_TYPE_INCREMENT) { 705 /* 706 * Triplet min/max/step description. Caller should use 707 * plat_scmi_voltd_levels_by_step(). 708 */ 709 return SCMI_NOT_SUPPORTED; 710 } 711 712 min_max_step[0] = levels[0]; 713 min_max_step[1] = levels[1]; 714 min_max_step[2] = levels[2]; 715 716 return SCMI_SUCCESS; 717 } 718 719 return SCMI_NOT_SUPPORTED; 720 } 721 722 int32_t plat_scmi_voltd_get_level(unsigned int channel_id, unsigned int scmi_id, 723 long *level_uv) 724 { 725 struct stm32_scmi_voltd *voltd = find_voltd(channel_id, scmi_id); 726 727 if (!voltd) 728 return SCMI_INVALID_PARAMETERS; 729 730 if (voltd->regulator) { 731 *level_uv = regulator_get_voltage(voltd->regulator); 732 return SCMI_SUCCESS; 733 } 734 735 return SCMI_DENIED; 736 } 737 738 int32_t plat_scmi_voltd_set_level(unsigned int channel_id, unsigned int scmi_id, 739 long level_uv) 740 { 741 struct stm32_scmi_voltd *voltd = find_voltd(channel_id, scmi_id); 742 743 if (!voltd) 744 return SCMI_NOT_FOUND; 745 746 if (voltd->regulator) { 747 TEE_Result res = TEE_ERROR_GENERIC; 748 749 if (level_uv < INT_MIN || level_uv > INT_MAX) 750 return SCMI_OUT_OF_RANGE; 751 752 res = regulator_set_voltage(voltd->regulator, level_uv); 753 if (res) 754 return SCMI_GENERIC_ERROR; 755 else 756 return SCMI_SUCCESS; 757 } 758 759 return SCMI_DENIED; 760 } 761 762 int32_t plat_scmi_voltd_get_config(unsigned int channel_id, 763 unsigned int scmi_id, uint32_t *config) 764 { 765 struct stm32_scmi_voltd *voltd = find_voltd(channel_id, scmi_id); 766 767 if (!voltd) 768 return SCMI_NOT_FOUND; 769 770 if (voltd->regulator) { 771 if (voltd->state) 772 *config = SCMI_VOLTAGE_DOMAIN_CONFIG_ARCH_ON; 773 else 774 *config = SCMI_VOLTAGE_DOMAIN_CONFIG_ARCH_OFF; 775 776 return SCMI_SUCCESS; 777 } 778 779 return SCMI_DENIED; 780 } 781 782 int32_t plat_scmi_voltd_set_config(unsigned int channel_id, 783 unsigned int scmi_id, uint32_t config) 784 { 785 struct stm32_scmi_voltd *voltd = find_voltd(channel_id, scmi_id); 786 787 if (!voltd) 788 return SCMI_NOT_FOUND; 789 790 if (voltd->regulator) { 791 switch (config) { 792 case SCMI_VOLTAGE_DOMAIN_CONFIG_ARCH_ON: 793 if (!voltd->state) { 794 if (regulator_enable(voltd->regulator)) 795 return SCMI_GENERIC_ERROR; 796 797 voltd->state = true; 798 } 799 break; 800 case SCMI_VOLTAGE_DOMAIN_CONFIG_ARCH_OFF: 801 if (voltd->state) { 802 if (regulator_disable(voltd->regulator)) 803 return SCMI_GENERIC_ERROR; 804 805 voltd->state = false; 806 } 807 break; 808 default: 809 return SCMI_INVALID_PARAMETERS; 810 } 811 812 return SCMI_SUCCESS; 813 } 814 815 return SCMI_DENIED; 816 } 817 818 static void get_voltd_regulator(struct stm32_scmi_voltd *voltd) 819 { 820 switch (voltd->priv_dev) { 821 case VOLTD_PWR: 822 voltd->regulator = stm32mp1_pwr_get_regulator(voltd->priv_id); 823 break; 824 case VOLTD_PMIC: 825 voltd->regulator = stm32mp_pmic_get_regulator(voltd->priv_name); 826 break; 827 case VOLTD_VREFBUF: 828 voltd->regulator = stm32_vrefbuf_regulator(); 829 break; 830 case VOLTD_IOD: 831 voltd->regulator = stm32mp1_get_iod_regulator(voltd->priv_id); 832 break; 833 default: 834 break; 835 } 836 837 if (voltd->regulator && voltd->regulator->flags & REGULATOR_BOOT_ON) 838 regulator_enable(voltd->regulator); 839 } 840 841 /* 842 * Initialize platform SCMI resources 843 */ 844 static TEE_Result stm32mp1_init_scmi_server(void) 845 { 846 size_t i = 0; 847 size_t j = 0; 848 849 for (i = 0; i < ARRAY_SIZE(scmi_channel); i++) { 850 const struct channel_resources *res = scmi_channel + i; 851 struct scmi_msg_channel *chan = res->channel; 852 853 if (chan->shm_addr.pa) { 854 struct io_pa_va *addr = &chan->shm_addr; 855 856 /* Enforce non-secure shm mapped as device memory */ 857 addr->va = (vaddr_t)phys_to_virt(addr->pa, 858 MEM_AREA_IO_NSEC, 859 chan->shm_size); 860 assert(addr->va); 861 862 scmi_smt_init_agent_channel(chan); 863 } 864 865 for (j = 0; j < res->clock_count; j++) { 866 struct stm32_scmi_clk *clk = &res->clock[j]; 867 868 if (!clk->name || 869 strlen(clk->name) >= SCMI_CLOCK_NAME_SIZE) 870 panic("SCMI clock name invalid"); 871 872 clk->clk = stm32mp_rcc_clock_id_to_clk(clk->clock_id); 873 assert(clk->clk); 874 875 /* Sync SCMI clocks with their targeted initial state */ 876 if (clk->enabled && 877 stm32mp_nsec_can_access_clock(clk->clock_id)) 878 clk_enable(clk->clk); 879 } 880 881 for (j = 0; j < res->rd_count; j++) { 882 struct stm32_scmi_rd *rd = &res->rd[j]; 883 struct rstctrl *rstctrl = NULL; 884 885 if (!rd->name || 886 strlen(rd->name) >= SCMI_RD_NAME_SIZE) 887 panic("SCMI reset domain name invalid"); 888 889 if (stm32mp_nsec_can_access_clock(rd->reset_id)) 890 continue; 891 892 rstctrl = stm32mp_rcc_reset_id_to_rstctrl(rd->reset_id); 893 assert(rstctrl); 894 if (rstctrl_get_exclusive(rstctrl)) 895 continue; 896 897 rd->rstctrl = rstctrl; 898 } 899 900 for (j = 0; j < res->voltd_count; j++) { 901 struct stm32_scmi_voltd *voltd = &res->voltd[j]; 902 903 if (!voltd->name || 904 strlen(voltd->name) >= SCMI_VOLTD_NAME_SIZE) 905 panic("SCMI voltage domain name invalid"); 906 907 get_voltd_regulator(voltd); 908 } 909 } 910 911 return TEE_SUCCESS; 912 } 913 914 driver_init_late(stm32mp1_init_scmi_server); 915