1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2019-2022, STMicroelectronics 4 */ 5 #include <assert.h> 6 #include <compiler.h> 7 #include <confine_array_index.h> 8 #include <drivers/clk.h> 9 #include <drivers/clk_dt.h> 10 #include <drivers/regulator.h> 11 #include <drivers/rstctrl.h> 12 #include <drivers/scmi-msg.h> 13 #include <drivers/scmi.h> 14 #include <drivers/stm32_vrefbuf.h> 15 #include <drivers/stm32mp1_pmic.h> 16 #include <drivers/stm32mp1_pwr.h> 17 #include <drivers/stpmic1.h> 18 #include <drivers/stpmic1_regulator.h> 19 #include <drivers/stm32mp_dt_bindings.h> 20 #include <initcall.h> 21 #include <mm/core_memprot.h> 22 #include <mm/core_mmu.h> 23 #include <platform_config.h> 24 #include <stdint.h> 25 #include <speculation_barrier.h> 26 #include <stm32_util.h> 27 #include <string.h> 28 #include <tee_api_defines.h> 29 #include <util.h> 30 31 #define TIMEOUT_US_1MS 1000 32 33 #define SCMI_CLOCK_NAME_SIZE 16 34 #define SCMI_RD_NAME_SIZE 16 35 #define SCMI_VOLTD_NAME_SIZE 16 36 37 /* 38 * struct stm32_scmi_clk - Data for the exposed clock 39 * @clock_id: Clock identifier in RCC clock driver 40 * @name: Clock string ID exposed to channel 41 * @enabled: State of the SCMI clock 42 */ 43 struct stm32_scmi_clk { 44 unsigned long clock_id; 45 struct clk *clk; 46 const char *name; 47 bool enabled; 48 }; 49 50 /* 51 * struct stm32_scmi_rd - Data for the exposed reset controller 52 * @reset_id: Reset identifier in RCC reset driver 53 * @name: Reset string ID exposed to channel 54 * @rstctrl: Reset controller device 55 */ 56 struct stm32_scmi_rd { 57 unsigned long reset_id; 58 const char *name; 59 struct rstctrl *rstctrl; 60 }; 61 62 enum voltd_device { 63 VOLTD_PWR, 64 VOLTD_PMIC, 65 VOLTD_VREFBUF, 66 /* Stub regulator until regulator framework is merged */ 67 VOLTD_STUB, 68 }; 69 70 /* 71 * struct stm32_scmi_voltd - Data for the exposed voltage domains 72 * @name: Power regulator string ID exposed to channel 73 * @priv_id: Internal string ID for the regulator 74 * @priv_dev: Internal ID for the device implementing the regulator 75 * @regulator: Regulator controller device 76 * @state: State of the SCMI voltage domain (true: enable, false: disable) 77 */ 78 struct stm32_scmi_voltd { 79 const char *name; 80 const char *priv_id; 81 enum voltd_device priv_dev; 82 struct regulator *regulator; 83 bool state; 84 }; 85 86 #if CFG_STM32MP1_SCMI_SHM_BASE 87 register_phys_mem(MEM_AREA_IO_NSEC, CFG_STM32MP1_SCMI_SHM_BASE, 88 CFG_STM32MP1_SCMI_SHM_SIZE); 89 90 /* Locate all non-secure SMT message buffers in last page of SYSRAM */ 91 #define SMT_BUFFER_BASE CFG_STM32MP1_SCMI_SHM_BASE 92 93 #if (SMT_BUFFER_BASE + SMT_BUF_SLOT_SIZE > \ 94 CFG_STM32MP1_SCMI_SHM_BASE + CFG_STM32MP1_SCMI_SHM_SIZE) 95 #error "SCMI shared memory mismatch" 96 #endif 97 #endif /*CFG_STM32MP1_SCMI_SHM_BASE*/ 98 99 #define CLOCK_CELL(_scmi_id, _id, _name, _init_enabled) \ 100 [(_scmi_id)] = { \ 101 .clock_id = (_id), \ 102 .name = (_name), \ 103 .enabled = (_init_enabled), \ 104 } 105 106 #define RESET_CELL(_scmi_id, _id, _name) \ 107 [(_scmi_id)] = { \ 108 .reset_id = (_id), \ 109 .name = (_name), \ 110 } 111 112 #define VOLTD_CELL(_scmi_id, _dev_id, _priv_id, _name) \ 113 [(_scmi_id)] = { \ 114 .priv_id = (_priv_id), \ 115 .priv_dev = (_dev_id), \ 116 .name = (_name), \ 117 } 118 119 #ifdef CFG_STM32MP13 120 static struct stm32_scmi_clk stm32_scmi_clock[] = { 121 CLOCK_CELL(CK_SCMI_HSE, CK_HSE, "ck_hse", true), 122 CLOCK_CELL(CK_SCMI_HSI, CK_HSI, "ck_hsi", true), 123 CLOCK_CELL(CK_SCMI_CSI, CK_CSI, "ck_csi", true), 124 CLOCK_CELL(CK_SCMI_LSE, CK_LSE, "ck_lse", true), 125 CLOCK_CELL(CK_SCMI_LSI, CK_LSI, "ck_lsi", true), 126 CLOCK_CELL(CK_SCMI_HSE_DIV2, CK_HSE_DIV2, "clk-hse-div2", true), 127 CLOCK_CELL(CK_SCMI_PLL2_Q, PLL2_Q, "pll2_q", true), 128 CLOCK_CELL(CK_SCMI_PLL2_R, PLL2_R, "pll2_r", true), 129 CLOCK_CELL(CK_SCMI_PLL3_P, PLL3_P, "pll3_p", true), 130 CLOCK_CELL(CK_SCMI_PLL3_Q, PLL3_Q, "pll3_q", true), 131 CLOCK_CELL(CK_SCMI_PLL3_R, PLL3_R, "pll3_r", true), 132 CLOCK_CELL(CK_SCMI_PLL4_P, PLL4_P, "pll4_p", true), 133 CLOCK_CELL(CK_SCMI_PLL4_Q, PLL4_Q, "pll4_q", true), 134 CLOCK_CELL(CK_SCMI_PLL4_R, PLL4_R, "pll4_r", true), 135 CLOCK_CELL(CK_SCMI_MPU, CK_MPU, "ck_mpu", true), 136 CLOCK_CELL(CK_SCMI_AXI, CK_AXI, "ck_axi", true), 137 CLOCK_CELL(CK_SCMI_MLAHB, CK_MLAHB, "ck_mlahb", true), 138 CLOCK_CELL(CK_SCMI_CKPER, CK_PER, "ck_per", true), 139 CLOCK_CELL(CK_SCMI_PCLK1, PCLK1, "pclk1", true), 140 CLOCK_CELL(CK_SCMI_PCLK2, PCLK2, "pclk2", true), 141 CLOCK_CELL(CK_SCMI_PCLK3, PCLK3, "pclk3", true), 142 CLOCK_CELL(CK_SCMI_PCLK4, PCLK4, "pclk4", true), 143 CLOCK_CELL(CK_SCMI_PCLK5, PCLK5, "pclk5", true), 144 CLOCK_CELL(CK_SCMI_PCLK6, PCLK6, "pclk6", true), 145 CLOCK_CELL(CK_SCMI_CKTIMG1, CK_TIMG1, "timg1_ck", true), 146 CLOCK_CELL(CK_SCMI_CKTIMG2, CK_TIMG2, "timg2_ck", true), 147 CLOCK_CELL(CK_SCMI_CKTIMG3, CK_TIMG3, "timg3_ck", true), 148 CLOCK_CELL(CK_SCMI_RTC, RTC, "ck_rtc", true), 149 CLOCK_CELL(CK_SCMI_RTCAPB, RTCAPB, "rtcapb", true), 150 CLOCK_CELL(CK_SCMI_BSEC, BSEC, "bsec", true), 151 }; 152 #endif 153 154 #ifdef CFG_STM32MP15 155 static struct stm32_scmi_clk stm32_scmi_clock[] = { 156 CLOCK_CELL(CK_SCMI_HSE, CK_HSE, "ck_hse", true), 157 CLOCK_CELL(CK_SCMI_HSI, CK_HSI, "ck_hsi", true), 158 CLOCK_CELL(CK_SCMI_CSI, CK_CSI, "ck_csi", true), 159 CLOCK_CELL(CK_SCMI_LSE, CK_LSE, "ck_lse", true), 160 CLOCK_CELL(CK_SCMI_LSI, CK_LSI, "ck_lsi", true), 161 CLOCK_CELL(CK_SCMI_PLL2_Q, PLL2_Q, "pll2_q", true), 162 CLOCK_CELL(CK_SCMI_PLL2_R, PLL2_R, "pll2_r", true), 163 CLOCK_CELL(CK_SCMI_MPU, CK_MPU, "ck_mpu", true), 164 CLOCK_CELL(CK_SCMI_AXI, CK_AXI, "ck_axi", true), 165 CLOCK_CELL(CK_SCMI_BSEC, BSEC, "bsec", true), 166 CLOCK_CELL(CK_SCMI_CRYP1, CRYP1, "cryp1", false), 167 CLOCK_CELL(CK_SCMI_GPIOZ, GPIOZ, "gpioz", false), 168 CLOCK_CELL(CK_SCMI_HASH1, HASH1, "hash1", false), 169 CLOCK_CELL(CK_SCMI_I2C4, I2C4_K, "i2c4_k", false), 170 CLOCK_CELL(CK_SCMI_I2C6, I2C6_K, "i2c6_k", false), 171 CLOCK_CELL(CK_SCMI_IWDG1, IWDG1, "iwdg1", false), 172 CLOCK_CELL(CK_SCMI_RNG1, RNG1_K, "rng1_k", true), 173 CLOCK_CELL(CK_SCMI_RTC, RTC, "ck_rtc", true), 174 CLOCK_CELL(CK_SCMI_RTCAPB, RTCAPB, "rtcapb", true), 175 CLOCK_CELL(CK_SCMI_SPI6, SPI6_K, "spi6_k", false), 176 CLOCK_CELL(CK_SCMI_USART1, USART1_K, "usart1_k", false), 177 }; 178 #endif 179 180 #ifdef CFG_STM32MP13 181 static struct stm32_scmi_rd stm32_scmi_reset_domain[] = { 182 RESET_CELL(RST_SCMI_LTDC, LTDC_R, "ltdc"), 183 RESET_CELL(RST_SCMI_MDMA, MDMA_R, "mdma"), 184 }; 185 #endif 186 187 #ifdef CFG_STM32MP15 188 static struct stm32_scmi_rd stm32_scmi_reset_domain[] = { 189 RESET_CELL(RST_SCMI_SPI6, SPI6_R, "spi6"), 190 RESET_CELL(RST_SCMI_I2C4, I2C4_R, "i2c4"), 191 RESET_CELL(RST_SCMI_I2C6, I2C6_R, "i2c6"), 192 RESET_CELL(RST_SCMI_USART1, USART1_R, "usart1"), 193 RESET_CELL(RST_SCMI_STGEN, STGEN_R, "stgen"), 194 RESET_CELL(RST_SCMI_GPIOZ, GPIOZ_R, "gpioz"), 195 RESET_CELL(RST_SCMI_CRYP1, CRYP1_R, "cryp1"), 196 RESET_CELL(RST_SCMI_HASH1, HASH1_R, "hash1"), 197 RESET_CELL(RST_SCMI_RNG1, RNG1_R, "rng1"), 198 RESET_CELL(RST_SCMI_MDMA, MDMA_R, "mdma"), 199 RESET_CELL(RST_SCMI_MCU, MCU_R, "mcu"), 200 RESET_CELL(RST_SCMI_MCU_HOLD_BOOT, MCU_HOLD_BOOT_R, "mcu_hold_boot"), 201 }; 202 #endif 203 204 #define PWR_REG11_NAME_ID "0" 205 #define PWR_REG18_NAME_ID "1" 206 #define PWR_USB33_NAME_ID "2" 207 208 #define STUB_SDMMC1_IO_NAME_ID "sdmmc1" 209 #define STUB_SDMMC2_IO_NAME_ID "sdmmc2" 210 211 #ifdef CFG_STM32MP13 212 struct stm32_scmi_voltd scmi_voltage_domain[] = { 213 VOLTD_CELL(VOLTD_SCMI_REG11, VOLTD_PWR, PWR_REG11_NAME_ID, "reg11"), 214 VOLTD_CELL(VOLTD_SCMI_REG18, VOLTD_PWR, PWR_REG18_NAME_ID, "reg18"), 215 VOLTD_CELL(VOLTD_SCMI_USB33, VOLTD_PWR, PWR_USB33_NAME_ID, "usb33"), 216 VOLTD_CELL(VOLTD_SCMI_SDMMC1_IO, VOLTD_STUB, STUB_SDMMC1_IO_NAME_ID, 217 "sdmmc1"), 218 VOLTD_CELL(VOLTD_SCMI_SDMMC2_IO, VOLTD_STUB, STUB_SDMMC2_IO_NAME_ID, 219 "sdmmc2"), 220 VOLTD_CELL(VOLTD_SCMI_VREFBUF, VOLTD_VREFBUF, "vrefbuf", "vrefbuf"), 221 VOLTD_CELL(VOLTD_SCMI_STPMIC1_BUCK1, VOLTD_PMIC, "buck1", "buck1"), 222 VOLTD_CELL(VOLTD_SCMI_STPMIC1_BUCK2, VOLTD_PMIC, "buck2", "buck2"), 223 VOLTD_CELL(VOLTD_SCMI_STPMIC1_BUCK3, VOLTD_PMIC, "buck3", "buck3"), 224 VOLTD_CELL(VOLTD_SCMI_STPMIC1_BUCK4, VOLTD_PMIC, "buck4", "buck4"), 225 VOLTD_CELL(VOLTD_SCMI_STPMIC1_LDO1, VOLTD_PMIC, "ldo1", "ldo1"), 226 VOLTD_CELL(VOLTD_SCMI_STPMIC1_LDO2, VOLTD_PMIC, "ldo2", "ldo2"), 227 VOLTD_CELL(VOLTD_SCMI_STPMIC1_LDO3, VOLTD_PMIC, "ldo3", "ldo3"), 228 VOLTD_CELL(VOLTD_SCMI_STPMIC1_LDO4, VOLTD_PMIC, "ldo4", "ldo4"), 229 VOLTD_CELL(VOLTD_SCMI_STPMIC1_LDO5, VOLTD_PMIC, "ldo5", "ldo5"), 230 VOLTD_CELL(VOLTD_SCMI_STPMIC1_LDO6, VOLTD_PMIC, "ldo6", "ldo6"), 231 VOLTD_CELL(VOLTD_SCMI_STPMIC1_VREFDDR, VOLTD_PMIC, "vref_ddr", 232 "vref_ddr"), 233 VOLTD_CELL(VOLTD_SCMI_STPMIC1_BOOST, VOLTD_PMIC, "boost", "bst_out"), 234 VOLTD_CELL(VOLTD_SCMI_STPMIC1_PWR_SW1, VOLTD_PMIC, "pwr_sw1", 235 "pwr_sw1"), 236 VOLTD_CELL(VOLTD_SCMI_STPMIC1_PWR_SW2, VOLTD_PMIC, "pwr_sw2", 237 "pwr_sw2"), 238 }; 239 #endif 240 241 #ifdef CFG_STM32MP15 242 struct stm32_scmi_voltd scmi_voltage_domain[] = { 243 VOLTD_CELL(VOLTD_SCMI_REG11, VOLTD_PWR, PWR_REG11_NAME_ID, "reg11"), 244 VOLTD_CELL(VOLTD_SCMI_REG18, VOLTD_PWR, PWR_REG18_NAME_ID, "reg18"), 245 VOLTD_CELL(VOLTD_SCMI_USB33, VOLTD_PWR, PWR_USB33_NAME_ID, "usb33"), 246 VOLTD_CELL(VOLTD_SCMI_STPMIC1_BUCK1, VOLTD_PMIC, "buck1", "vddcore"), 247 VOLTD_CELL(VOLTD_SCMI_STPMIC1_BUCK2, VOLTD_PMIC, "buck2", "vdd_ddr"), 248 VOLTD_CELL(VOLTD_SCMI_STPMIC1_BUCK3, VOLTD_PMIC, "buck3", "vdd"), 249 VOLTD_CELL(VOLTD_SCMI_STPMIC1_BUCK4, VOLTD_PMIC, "buck4", "v3v3"), 250 VOLTD_CELL(VOLTD_SCMI_STPMIC1_LDO1, VOLTD_PMIC, "ldo1", "v1v8_audio"), 251 VOLTD_CELL(VOLTD_SCMI_STPMIC1_LDO2, VOLTD_PMIC, "ldo2", "v3v3_hdmi"), 252 VOLTD_CELL(VOLTD_SCMI_STPMIC1_LDO3, VOLTD_PMIC, "ldo3", "vtt_ddr"), 253 VOLTD_CELL(VOLTD_SCMI_STPMIC1_LDO4, VOLTD_PMIC, "ldo4", "vdd_usb"), 254 VOLTD_CELL(VOLTD_SCMI_STPMIC1_LDO5, VOLTD_PMIC, "ldo5", "vdda"), 255 VOLTD_CELL(VOLTD_SCMI_STPMIC1_LDO6, VOLTD_PMIC, "ldo6", "v1v2_hdmi"), 256 VOLTD_CELL(VOLTD_SCMI_STPMIC1_VREFDDR, VOLTD_PMIC, "vref_ddr", 257 "vref_ddr"), 258 VOLTD_CELL(VOLTD_SCMI_STPMIC1_BOOST, VOLTD_PMIC, "boost", "bst_out"), 259 VOLTD_CELL(VOLTD_SCMI_STPMIC1_PWR_SW1, VOLTD_PMIC, "pwr_sw1", 260 "vbus_otg"), 261 VOLTD_CELL(VOLTD_SCMI_STPMIC1_PWR_SW2, VOLTD_PMIC, "pwr_sw2", 262 "vbus_sw"), 263 }; 264 #endif 265 266 struct channel_resources { 267 struct scmi_msg_channel *channel; 268 struct stm32_scmi_clk *clock; 269 size_t clock_count; 270 struct stm32_scmi_rd *rd; 271 size_t rd_count; 272 struct stm32_scmi_voltd *voltd; 273 size_t voltd_count; 274 }; 275 276 static const struct channel_resources scmi_channel[] = { 277 [0] = { 278 .channel = &(struct scmi_msg_channel){ 279 #ifdef SMT_BUFFER_BASE 280 .shm_addr = { .pa = SMT_BUFFER_BASE }, 281 .shm_size = SMT_BUF_SLOT_SIZE, 282 #endif 283 }, 284 .clock = stm32_scmi_clock, 285 .clock_count = ARRAY_SIZE(stm32_scmi_clock), 286 .rd = stm32_scmi_reset_domain, 287 .rd_count = ARRAY_SIZE(stm32_scmi_reset_domain), 288 .voltd = scmi_voltage_domain, 289 .voltd_count = ARRAY_SIZE(scmi_voltage_domain), 290 }, 291 }; 292 293 static const struct channel_resources *find_resource(unsigned int channel_id) 294 { 295 assert(channel_id < ARRAY_SIZE(scmi_channel)); 296 297 return scmi_channel + channel_id; 298 } 299 300 struct scmi_msg_channel *plat_scmi_get_channel(unsigned int channel_id) 301 { 302 const size_t max_id = ARRAY_SIZE(scmi_channel); 303 unsigned int confined_id = confine_array_index(channel_id, max_id); 304 305 if (channel_id >= max_id) 306 return NULL; 307 308 return find_resource(confined_id)->channel; 309 } 310 311 static size_t __maybe_unused plat_scmi_protocol_count_paranoid(void) 312 { 313 unsigned int n = 0; 314 unsigned int count = 0; 315 const size_t channel_count = ARRAY_SIZE(scmi_channel); 316 317 for (n = 0; n < channel_count; n++) 318 if (scmi_channel[n].clock_count) 319 break; 320 if (n < channel_count) 321 count++; 322 323 for (n = 0; n < channel_count; n++) 324 if (scmi_channel[n].rd_count) 325 break; 326 if (n < channel_count) 327 count++; 328 329 for (n = 0; n < channel_count; n++) 330 if (scmi_channel[n].voltd_count) 331 break; 332 if (n < channel_count) 333 count++; 334 335 return count; 336 } 337 338 static const char vendor[] = "ST"; 339 static const char sub_vendor[] = ""; 340 341 const char *plat_scmi_vendor_name(void) 342 { 343 return vendor; 344 } 345 346 const char *plat_scmi_sub_vendor_name(void) 347 { 348 return sub_vendor; 349 } 350 351 /* Currently supporting Clocks and Reset Domains */ 352 static const uint8_t plat_protocol_list[] = { 353 SCMI_PROTOCOL_ID_CLOCK, 354 SCMI_PROTOCOL_ID_RESET_DOMAIN, 355 SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN, 356 0 /* Null termination */ 357 }; 358 359 size_t plat_scmi_protocol_count(void) 360 { 361 const size_t count = ARRAY_SIZE(plat_protocol_list) - 1; 362 363 assert(count == plat_scmi_protocol_count_paranoid()); 364 365 return count; 366 } 367 368 const uint8_t *plat_scmi_protocol_list(unsigned int channel_id __unused) 369 { 370 assert(plat_scmi_protocol_count_paranoid() == 371 (ARRAY_SIZE(plat_protocol_list) - 1)); 372 373 return plat_protocol_list; 374 } 375 376 /* 377 * Platform SCMI clocks 378 */ 379 static struct stm32_scmi_clk *find_clock(unsigned int channel_id, 380 unsigned int scmi_id) 381 { 382 const struct channel_resources *resource = find_resource(channel_id); 383 size_t n = 0; 384 385 if (resource) { 386 for (n = 0; n < resource->clock_count; n++) 387 if (n == scmi_id) 388 return &resource->clock[n]; 389 } 390 391 return NULL; 392 } 393 394 size_t plat_scmi_clock_count(unsigned int channel_id) 395 { 396 const struct channel_resources *resource = find_resource(channel_id); 397 398 if (!resource) 399 return 0; 400 401 return resource->clock_count; 402 } 403 404 const char *plat_scmi_clock_get_name(unsigned int channel_id, 405 unsigned int scmi_id) 406 { 407 struct stm32_scmi_clk *clock = find_clock(channel_id, scmi_id); 408 409 if (!clock || !stm32mp_nsec_can_access_clock(clock->clock_id)) 410 return NULL; 411 412 return clock->name; 413 } 414 415 int32_t plat_scmi_clock_rates_array(unsigned int channel_id, 416 unsigned int scmi_id, size_t start_index, 417 unsigned long *array, size_t *nb_elts) 418 { 419 struct stm32_scmi_clk *clock = find_clock(channel_id, scmi_id); 420 421 if (!clock) 422 return SCMI_NOT_FOUND; 423 424 if (!stm32mp_nsec_can_access_clock(clock->clock_id)) 425 return SCMI_DENIED; 426 427 /* Exposed clocks are currently fixed rate clocks */ 428 if (start_index) 429 return SCMI_INVALID_PARAMETERS; 430 431 if (!array) 432 *nb_elts = 1; 433 else if (*nb_elts == 1) 434 *array = clk_get_rate(clock->clk); 435 else 436 return SCMI_GENERIC_ERROR; 437 438 return SCMI_SUCCESS; 439 } 440 441 unsigned long plat_scmi_clock_get_rate(unsigned int channel_id, 442 unsigned int scmi_id) 443 { 444 struct stm32_scmi_clk *clock = find_clock(channel_id, scmi_id); 445 446 if (!clock || !stm32mp_nsec_can_access_clock(clock->clock_id)) 447 return 0; 448 449 return clk_get_rate(clock->clk); 450 } 451 452 int32_t plat_scmi_clock_get_state(unsigned int channel_id, unsigned int scmi_id) 453 { 454 struct stm32_scmi_clk *clock = find_clock(channel_id, scmi_id); 455 456 if (!clock || !stm32mp_nsec_can_access_clock(clock->clock_id)) 457 return 0; 458 459 return (int32_t)clock->enabled; 460 } 461 462 int32_t plat_scmi_clock_set_state(unsigned int channel_id, unsigned int scmi_id, 463 bool enable_not_disable) 464 { 465 struct stm32_scmi_clk *clock = find_clock(channel_id, scmi_id); 466 467 if (!clock) 468 return SCMI_NOT_FOUND; 469 470 if (!stm32mp_nsec_can_access_clock(clock->clock_id)) 471 return SCMI_DENIED; 472 473 if (enable_not_disable) { 474 if (!clock->enabled) { 475 FMSG("SCMI clock %u enable", scmi_id); 476 clk_enable(clock->clk); 477 clock->enabled = true; 478 } 479 } else { 480 if (clock->enabled) { 481 FMSG("SCMI clock %u disable", scmi_id); 482 clk_disable(clock->clk); 483 clock->enabled = false; 484 } 485 } 486 487 return SCMI_SUCCESS; 488 } 489 490 /* 491 * Platform SCMI reset domains 492 */ 493 static struct stm32_scmi_rd *find_rd(unsigned int channel_id, 494 unsigned int scmi_id) 495 { 496 const struct channel_resources *resource = find_resource(channel_id); 497 size_t n = 0; 498 499 if (resource) { 500 for (n = 0; n < resource->rd_count; n++) 501 if (n == scmi_id) 502 return &resource->rd[n]; 503 } 504 505 return NULL; 506 } 507 508 const char *plat_scmi_rd_get_name(unsigned int channel_id, unsigned int scmi_id) 509 { 510 const struct stm32_scmi_rd *rd = find_rd(channel_id, scmi_id); 511 512 if (!rd) 513 return NULL; 514 515 return rd->name; 516 } 517 518 size_t plat_scmi_rd_count(unsigned int channel_id) 519 { 520 const struct channel_resources *resource = find_resource(channel_id); 521 522 if (!resource) 523 return 0; 524 525 return resource->rd_count; 526 } 527 528 int32_t plat_scmi_rd_autonomous(unsigned int channel_id, unsigned int scmi_id, 529 uint32_t state) 530 { 531 const struct stm32_scmi_rd *rd = find_rd(channel_id, scmi_id); 532 533 if (!rd) 534 return SCMI_NOT_FOUND; 535 536 if (!rd->rstctrl || !stm32mp_nsec_can_access_reset(rd->reset_id)) 537 return SCMI_DENIED; 538 assert(rd->rstctrl); 539 540 #ifdef CFG_STM32MP15 541 if (rd->reset_id == MCU_HOLD_BOOT_R) 542 return SCMI_NOT_SUPPORTED; 543 #endif 544 545 /* Supports only reset with context loss */ 546 if (state) 547 return SCMI_NOT_SUPPORTED; 548 549 FMSG("SCMI reset %u cycle", scmi_id); 550 551 if (rstctrl_assert_to(rd->rstctrl, TIMEOUT_US_1MS)) 552 return SCMI_HARDWARE_ERROR; 553 554 if (rstctrl_deassert_to(rd->rstctrl, TIMEOUT_US_1MS)) 555 return SCMI_HARDWARE_ERROR; 556 557 return SCMI_SUCCESS; 558 } 559 560 int32_t plat_scmi_rd_set_state(unsigned int channel_id, unsigned int scmi_id, 561 bool assert_not_deassert) 562 { 563 const struct stm32_scmi_rd *rd = find_rd(channel_id, scmi_id); 564 TEE_Result res = TEE_ERROR_GENERIC; 565 566 if (!rd) 567 return SCMI_NOT_FOUND; 568 569 if (!rd->rstctrl || !stm32mp_nsec_can_access_reset(rd->reset_id)) 570 return SCMI_DENIED; 571 assert(rd->rstctrl); 572 573 if (assert_not_deassert) { 574 FMSG("SCMI reset %u set", scmi_id); 575 res = rstctrl_assert(rd->rstctrl); 576 } else { 577 FMSG("SCMI reset %u release", scmi_id); 578 res = rstctrl_deassert(rd->rstctrl); 579 } 580 581 if (res) 582 return SCMI_HARDWARE_ERROR; 583 584 return SCMI_SUCCESS; 585 } 586 587 /* 588 * Platform SCMI voltage domains 589 */ 590 static struct stm32_scmi_voltd *find_voltd(unsigned int channel_id, 591 unsigned int scmi_id) 592 { 593 const struct channel_resources *resource = find_resource(channel_id); 594 size_t n = 0; 595 596 if (resource) { 597 for (n = 0; n < resource->voltd_count; n++) 598 if (n == scmi_id) 599 return &resource->voltd[n]; 600 } 601 602 return NULL; 603 } 604 605 size_t plat_scmi_voltd_count(unsigned int channel_id) 606 { 607 const struct channel_resources *resource = find_resource(channel_id); 608 609 if (!resource) 610 return 0; 611 612 return resource->voltd_count; 613 } 614 615 const char *plat_scmi_voltd_get_name(unsigned int channel_id, 616 unsigned int scmi_id) 617 { 618 struct stm32_scmi_voltd *voltd = find_voltd(channel_id, scmi_id); 619 620 /* Currently non-secure is allowed to access all PWR regulators */ 621 if (!voltd) 622 return NULL; 623 624 return voltd->name; 625 } 626 627 static enum pwr_regulator pwr_scmi_to_regu_id(struct stm32_scmi_voltd *voltd) 628 { 629 if (!strcmp(voltd->priv_id, PWR_REG11_NAME_ID)) 630 return PWR_REG11; 631 if (!strcmp(voltd->priv_id, PWR_REG18_NAME_ID)) 632 return PWR_REG18; 633 if (!strcmp(voltd->priv_id, PWR_USB33_NAME_ID)) 634 return PWR_USB33; 635 636 panic(); 637 } 638 639 static long stub_get_level_uv(struct stm32_scmi_voltd *voltd) 640 { 641 if (!strcmp(voltd->priv_id, STUB_SDMMC1_IO_NAME_ID) || 642 !strcmp(voltd->priv_id, STUB_SDMMC2_IO_NAME_ID)) 643 return 3300000; 644 645 panic(); 646 } 647 648 static int32_t stub_describe_levels(struct stm32_scmi_voltd *voltd __unused, 649 size_t start_index, long *microvolt, 650 size_t *nb_elts) 651 { 652 if (start_index) 653 return SCMI_INVALID_PARAMETERS; 654 655 if (!microvolt || !*nb_elts) { 656 *nb_elts = 1; 657 return SCMI_SUCCESS; 658 } 659 660 microvolt[0] = stub_get_level_uv(voltd); 661 *nb_elts = 1; 662 663 return SCMI_SUCCESS; 664 } 665 666 int32_t plat_scmi_voltd_levels_array(unsigned int channel_id, 667 unsigned int scmi_id, size_t start_index, 668 long *levels, size_t *nb_elts) 669 670 { 671 struct stm32_scmi_voltd *voltd = find_voltd(channel_id, scmi_id); 672 673 if (!voltd) 674 return SCMI_NOT_FOUND; 675 676 if (voltd->regulator) { 677 struct regulator_voltages *voltages = NULL; 678 TEE_Result res = TEE_ERROR_GENERIC; 679 int *ref = NULL; 680 size_t ref_count = 0; 681 size_t n = 0; 682 683 res = regulator_supported_voltages(voltd->regulator, &voltages); 684 if (res == TEE_ERROR_NOT_SUPPORTED) 685 return SCMI_NOT_SUPPORTED; 686 if (res) 687 return SCMI_GENERIC_ERROR; 688 if (!voltages || voltages->type != VOLTAGE_TYPE_FULL_LIST) { 689 /* 690 * Triplet min/max/step description. Caller should use 691 * plat_scmi_voltd_levels_by_step(). 692 */ 693 return SCMI_NOT_SUPPORTED; 694 } 695 696 ref = voltages->entries; 697 ref_count = voltages->num_levels; 698 699 /* Bound according to regulator registered min/max levels */ 700 for (n = ref_count; n > 0; n--) 701 if (voltages->entries[n - 1] > voltd->regulator->max_uv) 702 ref_count--; 703 for (n = 0; n < ref_count; n++) 704 if (voltages->entries[n] >= voltd->regulator->min_uv) 705 break; 706 707 if (n == ref_count) { 708 DMSG("Voltage list out of regulator %s level bounds", 709 regulator_name(voltd->regulator)); 710 return SCMI_GENERIC_ERROR; 711 } 712 713 if (start_index >= ref_count) 714 return SCMI_OUT_OF_RANGE; 715 716 if (!*nb_elts) { 717 *nb_elts = ref_count - start_index; 718 return SCMI_SUCCESS; 719 } 720 721 for (n = 0; n < *nb_elts; n++) 722 levels[n] = ref[start_index + n]; 723 724 return SCMI_SUCCESS; 725 } 726 727 switch (voltd->priv_dev) { 728 case VOLTD_STUB: 729 return stub_describe_levels(voltd, start_index, levels, 730 nb_elts); 731 default: 732 return SCMI_DENIED; 733 } 734 } 735 736 int32_t plat_scmi_voltd_levels_by_step(unsigned int channel_id, 737 unsigned int scmi_id, long *min_max_step) 738 { 739 struct stm32_scmi_voltd *voltd = find_voltd(channel_id, scmi_id); 740 741 if (!voltd) 742 return SCMI_NOT_FOUND; 743 744 if (voltd->regulator) { 745 struct regulator_voltages *voltages = NULL; 746 TEE_Result res = TEE_ERROR_GENERIC; 747 int ref_min = 0; 748 int ref_max = 0; 749 int ref_step = 0; 750 751 res = regulator_supported_voltages(voltd->regulator, &voltages); 752 if (res == TEE_ERROR_NOT_SUPPORTED) 753 return SCMI_NOT_SUPPORTED; 754 if (res) 755 return SCMI_GENERIC_ERROR; 756 if (!voltages || voltages->type != VOLTAGE_TYPE_INCREMENT) { 757 /* 758 * Triplet min/max/step description. Caller should use 759 * plat_scmi_voltd_levels_by_step(). 760 */ 761 return SCMI_NOT_SUPPORTED; 762 } 763 764 ref_min = voltages->entries[0]; 765 ref_max = voltages->entries[1]; 766 ref_step = voltages->entries[2]; 767 768 if (ref_min < voltd->regulator->min_uv) { 769 int diff = voltd->regulator->min_uv - ref_min; 770 int incr = DIV_ROUND_UP(diff, ref_step); 771 772 ref_min += ref_step * incr; 773 } 774 775 if (ref_max > voltd->regulator->max_uv) { 776 int diff = ref_max - voltd->regulator->max_uv; 777 int decr = diff / ref_step; 778 779 ref_max -= ref_step * decr; 780 } 781 782 min_max_step[0] = ref_min; 783 min_max_step[1] = ref_max; 784 min_max_step[2] = ref_step; 785 786 return SCMI_SUCCESS; 787 } 788 789 return SCMI_NOT_SUPPORTED; 790 } 791 792 int32_t plat_scmi_voltd_get_level(unsigned int channel_id, unsigned int scmi_id, 793 long *level_uv) 794 { 795 struct stm32_scmi_voltd *voltd = find_voltd(channel_id, scmi_id); 796 797 if (!voltd) 798 return SCMI_INVALID_PARAMETERS; 799 800 if (voltd->regulator) { 801 *level_uv = regulator_get_voltage(voltd->regulator); 802 return SCMI_SUCCESS; 803 } 804 805 switch (voltd->priv_dev) { 806 case VOLTD_STUB: 807 *level_uv = stub_get_level_uv(voltd); 808 return SCMI_SUCCESS; 809 default: 810 return SCMI_DENIED; 811 } 812 } 813 814 int32_t plat_scmi_voltd_set_level(unsigned int channel_id, unsigned int scmi_id, 815 long level_uv) 816 { 817 struct stm32_scmi_voltd *voltd = find_voltd(channel_id, scmi_id); 818 819 if (!voltd) 820 return SCMI_NOT_FOUND; 821 822 if (voltd->regulator) { 823 TEE_Result res = TEE_ERROR_GENERIC; 824 825 if (level_uv < INT_MIN || level_uv > INT_MAX) 826 return SCMI_OUT_OF_RANGE; 827 828 res = regulator_set_voltage(voltd->regulator, level_uv); 829 if (res) 830 return SCMI_GENERIC_ERROR; 831 else 832 return SCMI_SUCCESS; 833 } 834 835 switch (voltd->priv_dev) { 836 case VOLTD_STUB: 837 return SCMI_SUCCESS; 838 default: 839 return SCMI_DENIED; 840 } 841 } 842 843 int32_t plat_scmi_voltd_get_config(unsigned int channel_id, 844 unsigned int scmi_id, uint32_t *config) 845 { 846 struct stm32_scmi_voltd *voltd = find_voltd(channel_id, scmi_id); 847 848 if (!voltd) 849 return SCMI_NOT_FOUND; 850 851 if (voltd->regulator) { 852 if (voltd->state) 853 *config = SCMI_VOLTAGE_DOMAIN_CONFIG_ARCH_ON; 854 else 855 *config = SCMI_VOLTAGE_DOMAIN_CONFIG_ARCH_OFF; 856 857 return SCMI_SUCCESS; 858 } 859 860 switch (voltd->priv_dev) { 861 case VOLTD_STUB: 862 *config = SCMI_VOLTAGE_DOMAIN_CONFIG_ARCH_ON; 863 return SCMI_SUCCESS; 864 default: 865 return SCMI_DENIED; 866 } 867 } 868 869 int32_t plat_scmi_voltd_set_config(unsigned int channel_id, 870 unsigned int scmi_id, uint32_t config) 871 { 872 struct stm32_scmi_voltd *voltd = find_voltd(channel_id, scmi_id); 873 874 if (!voltd) 875 return SCMI_NOT_FOUND; 876 877 if (voltd->regulator) { 878 TEE_Result res = TEE_ERROR_GENERIC; 879 880 if (config == SCMI_VOLTAGE_DOMAIN_CONFIG_ARCH_ON && 881 !voltd->state) { 882 res = regulator_enable(voltd->regulator); 883 if (!res) 884 voltd->state = true; 885 } else if (config == SCMI_VOLTAGE_DOMAIN_CONFIG_ARCH_OFF && 886 voltd->state) { 887 res = regulator_disable(voltd->regulator); 888 if (!res) 889 voltd->state = false; 890 } else { 891 res = TEE_ERROR_GENERIC; 892 } 893 894 if (res) 895 return SCMI_GENERIC_ERROR; 896 else 897 return SCMI_SUCCESS; 898 } 899 900 switch (voltd->priv_dev) { 901 case VOLTD_STUB: 902 return SCMI_SUCCESS; 903 default: 904 return SCMI_DENIED; 905 } 906 } 907 908 static void get_voltd_regulator(struct stm32_scmi_voltd *voltd) 909 { 910 enum pwr_regulator regu_id = PWR_REGU_COUNT; 911 912 switch (voltd->priv_dev) { 913 case VOLTD_PWR: 914 regu_id = pwr_scmi_to_regu_id(voltd); 915 voltd->regulator = stm32mp1_pwr_get_regulator(regu_id); 916 break; 917 case VOLTD_PMIC: 918 voltd->regulator = stm32mp_pmic_get_regulator(voltd->priv_id); 919 break; 920 case VOLTD_VREFBUF: 921 voltd->regulator = stm32_vrefbuf_regulator(); 922 break; 923 case VOLTD_STUB: 924 break; 925 default: 926 break; 927 } 928 929 if (voltd->regulator && voltd->regulator->flags & REGULATOR_BOOT_ON) 930 regulator_enable(voltd->regulator); 931 } 932 933 /* 934 * Initialize platform SCMI resources 935 */ 936 static TEE_Result stm32mp1_init_scmi_server(void) 937 { 938 size_t i = 0; 939 size_t j = 0; 940 941 for (i = 0; i < ARRAY_SIZE(scmi_channel); i++) { 942 const struct channel_resources *res = scmi_channel + i; 943 struct scmi_msg_channel *chan = res->channel; 944 945 if (chan->shm_addr.pa) { 946 struct io_pa_va *addr = &chan->shm_addr; 947 948 /* Enforce non-secure shm mapped as device memory */ 949 addr->va = (vaddr_t)phys_to_virt(addr->pa, 950 MEM_AREA_IO_NSEC, 951 chan->shm_size); 952 assert(addr->va); 953 954 scmi_smt_init_agent_channel(chan); 955 } 956 957 for (j = 0; j < res->clock_count; j++) { 958 struct stm32_scmi_clk *clk = &res->clock[j]; 959 960 if (!clk->name || 961 strlen(clk->name) >= SCMI_CLOCK_NAME_SIZE) 962 panic("SCMI clock name invalid"); 963 964 clk->clk = stm32mp_rcc_clock_id_to_clk(clk->clock_id); 965 assert(clk->clk); 966 967 /* Sync SCMI clocks with their targeted initial state */ 968 if (clk->enabled && 969 stm32mp_nsec_can_access_clock(clk->clock_id)) 970 clk_enable(clk->clk); 971 } 972 973 for (j = 0; j < res->rd_count; j++) { 974 struct stm32_scmi_rd *rd = &res->rd[j]; 975 struct rstctrl *rstctrl = NULL; 976 977 if (!rd->name || 978 strlen(rd->name) >= SCMI_RD_NAME_SIZE) 979 panic("SCMI reset domain name invalid"); 980 981 if (stm32mp_nsec_can_access_clock(rd->reset_id)) 982 continue; 983 984 rstctrl = stm32mp_rcc_reset_id_to_rstctrl(rd->reset_id); 985 assert(rstctrl); 986 if (rstctrl_get_exclusive(rstctrl)) 987 continue; 988 989 rd->rstctrl = rstctrl; 990 } 991 992 for (j = 0; j < res->voltd_count; j++) { 993 struct stm32_scmi_voltd *voltd = &res->voltd[j]; 994 995 if (!voltd->name || 996 strlen(voltd->name) >= SCMI_VOLTD_NAME_SIZE) 997 panic("SCMI voltage domain name invalid"); 998 999 get_voltd_regulator(voltd); 1000 } 1001 } 1002 1003 return TEE_SUCCESS; 1004 } 1005 1006 driver_init_late(stm32mp1_init_scmi_server); 1007