xref: /optee_os/core/arch/arm/plat-stm32mp1/reset.S (revision 827be46c173f31c57006af70ca3a15a5b1a7fba3)
1/* SPDX-License-Identifier: BSD-3-Clause */
2/*
3 * Copyright (c) 2018, STMicroelectronics
4 */
5
6#include <arm32.h>
7#include <arm32_macros.S>
8#include <asm.S>
9
10.section .text
11.balign 4
12.code 32
13
14#define STM32MP1_NSACR_PRESERVE_MASK	(0xfff << 20)
15
16FUNC plat_cpu_reset_early , :
17UNWIND(	.fnstart)
18	ldr	r0, =SCR_SIF
19	write_scr r0
20
21	read_nsacr r0
22	mov_imm	r1, STM32MP1_NSACR_PRESERVE_MASK
23	and	r0, r0, r1
24	write_nsacr r0
25
26	isb
27	bx	lr
28UNWIND(	.fnend)
29END_FUNC plat_cpu_reset_early
30