xref: /optee_os/core/arch/arm/plat-stm32mp1/reset.S (revision 5a913ee74d3c71af2a2860ce8a4e7aeab2916f9b)
1/* SPDX-License-Identifier: BSD-3-Clause */
2/*
3 * Copyright (c) 2018, STMicroelectronics
4 */
5
6#include <arm32.h>
7#include <arm32_macros.S>
8#include <asm.S>
9#include <kernel/unwind.h>
10
11.section .text
12.balign 4
13.code 32
14
15#define STM32MP1_NSACR_PRESERVE_MASK	(0xfff << 20)
16
17FUNC plat_cpu_reset_early , :
18UNWIND(	.fnstart)
19	ldr	r0, =SCR_SIF
20	write_scr r0
21
22	read_nsacr r0
23	mov_imm	r1, STM32MP1_NSACR_PRESERVE_MASK
24	and	r0, r0, r1
25	write_nsacr r0
26
27	isb
28	bx	lr
29UNWIND(	.fnend)
30END_FUNC plat_cpu_reset_early
31