1# 1GB and 512MB DDR targets do not locate secure DDR at the same place. 2flavor_dts_file-157A_DK1 = stm32mp157a-dk1.dts 3flavor_dts_file-157C_DK2 = stm32mp157c-dk2.dts 4flavor_dts_file-157C_ED1 = stm32mp157c-ed1.dts 5flavor_dts_file-157C_EV1 = stm32mp157c-ev1.dts 6 7flavorlist-cryp-512M = $(flavor_dts_file-157C_DK2) 8 9flavorlist-no_cryp-512M = $(flavor_dts_file-157A_DK1) 10 11flavorlist-cryp-1G = $(flavor_dts_file-157C_ED1) \ 12 $(flavor_dts_file-157C_EV1) 13 14flavorlist-no_cryp = $(flavorlist-no_cryp-512M) 15 16flavorlist-512M = $(flavorlist-cryp-512M) \ 17 $(flavorlist-no_cryp-512M) 18 19flavorlist-1G = $(flavorlist-cryp-1G) 20 21ifneq ($(PLATFORM_FLAVOR),) 22ifeq ($(flavor_dts_file-$(PLATFORM_FLAVOR)),) 23$(error Invalid platform flavor $(PLATFORM_FLAVOR)) 24endif 25CFG_EMBED_DTB_SOURCE_FILE ?= $(flavor_dts_file-$(PLATFORM_FLAVOR)) 26endif 27 28ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-no_cryp)),) 29$(call force,CFG_STM32_CRYP,n) 30endif 31 32include core/arch/arm/cpu/cortex-a7.mk 33 34$(call force,CFG_BOOT_SECONDARY_REQUEST,y) 35$(call force,CFG_DRIVERS_CLK,y) 36$(call force,CFG_DRIVERS_CLK_FIXED,n) 37$(call force,CFG_GIC,y) 38$(call force,CFG_INIT_CNTVOFF,y) 39$(call force,CFG_PSCI_ARM32,y) 40$(call force,CFG_SECONDARY_INIT_CNTFRQ,y) 41$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 42$(call force,CFG_SM_PLATFORM_HANDLER,y) 43$(call force,CFG_WITH_SOFTWARE_PRNG,y) 44 45ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-512M)),) 46CFG_TZDRAM_START ?= 0xde000000 47CFG_SHMEM_START ?= 0xdfe00000 48CFG_DRAM_SIZE ?= 0x20000000 49endif 50 51CFG_TZSRAM_START ?= 0x2ffc0000 52CFG_TZSRAM_SIZE ?= 0x0003f000 53CFG_STM32MP1_SCMI_SHM_BASE ?= 0x2ffff000 54CFG_STM32MP1_SCMI_SHM_SIZE ?= 0x00001000 55CFG_TZDRAM_START ?= 0xfe000000 56CFG_TZDRAM_SIZE ?= 0x01e00000 57CFG_SHMEM_START ?= 0xffe00000 58CFG_SHMEM_SIZE ?= 0x00200000 59CFG_DRAM_SIZE ?= 0x40000000 60 61CFG_TEE_CORE_NB_CORE ?= 2 62CFG_WITH_PAGER ?= y 63CFG_WITH_LPAE ?= y 64CFG_MMAP_REGIONS ?= 23 65CFG_DTB_MAX_SIZE ?= (256 * 1024) 66 67ifeq ($(CFG_EMBED_DTB_SOURCE_FILE),) 68# Some drivers mandate DT support 69$(call force,CFG_DRIVERS_CLK_DT,n) 70$(call force,CFG_STM32_CRYP,n) 71$(call force,CFG_STM32_GPIO,n) 72$(call force,CFG_STM32_I2C,n) 73$(call force,CFG_STM32_IWDG,n) 74$(call force,CFG_STM32_TAMP,n) 75$(call force,CFG_STPMIC1,n) 76$(call force,CFG_STM32MP1_SCMI_SIP,n) 77$(call force,CFG_SCMI_PTA,n) 78else 79$(call force,CFG_DRIVERS_CLK_DT,y) 80endif 81 82ifeq ($(CFG_STM32MP13),y) 83$(call force,CFG_STM32MP15,n) 84$(call force,CFG_STM32MP_CLK_CORE,y) 85$(call force,CFG_STM32MP13_CLK,y) 86$(call force,CFG_STM32MP15_CLK,n) 87CFG_STM32MP_OPP_COUNT ?= 2 88else 89$(call force,CFG_STM32MP15,y) 90$(call force,CFG_STM32MP15_CLK,y) 91endif 92 93CFG_STM32_BSEC ?= y 94CFG_STM32_CRYP ?= y 95CFG_STM32_ETZPC ?= y 96CFG_STM32_GPIO ?= y 97CFG_STM32_I2C ?= y 98CFG_STM32_IWDG ?= y 99CFG_STM32_RNG ?= y 100CFG_STM32_RSTCTRL ?= y 101CFG_STM32_TAMP ?= y 102CFG_STM32_UART ?= y 103CFG_STPMIC1 ?= y 104CFG_TZC400 ?= y 105 106ifeq ($(CFG_STPMIC1),y) 107$(call force,CFG_STM32_I2C,y) 108$(call force,CFG_STM32_GPIO,y) 109endif 110 111# if any crypto driver is enabled, enable the crypto-framework layer 112ifeq ($(call cfg-one-enabled, CFG_STM32_CRYP),y) 113$(call force,CFG_STM32_CRYPTO_DRIVER,y) 114endif 115 116CFG_DRIVERS_RSTCTRL ?= $(CFG_STM32_RSTCTRL) 117$(eval $(call cfg-depends-all,CFG_STM32_RSTCTRL,CFG_DRIVERS_RSTCTRL)) 118 119CFG_WDT ?= $(CFG_STM32_IWDG) 120 121# Platform specific configuration 122CFG_STM32MP_PANIC_ON_TZC_PERM_VIOLATION ?= y 123 124# SiP/OEM service for non-secure world 125CFG_STM32_BSEC_SIP ?= y 126CFG_STM32MP1_SCMI_SIP ?= y 127ifeq ($(CFG_STM32MP1_SCMI_SIP),y) 128$(call force,CFG_SCMI_MSG_DRIVERS,y,Mandated by CFG_STM32MP1_SCMI_SIP) 129$(call force,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,y,Mandated by CFG_STM32MP1_SCMI_SIP) 130endif 131 132# Default enable SCMI PTA support 133CFG_SCMI_PTA ?= y 134ifeq ($(CFG_SCMI_PTA),y) 135$(call force,CFG_SCMI_MSG_DRIVERS,y,Mandated by CFG_SCMI_PTA) 136$(call force,CFG_SCMI_MSG_SMT_THREAD_ENTRY,y,Mandated by CFG_SCMI_PTA) 137endif 138 139CFG_SCMI_MSG_DRIVERS ?= n 140ifeq ($(CFG_SCMI_MSG_DRIVERS),y) 141$(call force,CFG_SCMI_MSG_CLOCK,y) 142$(call force,CFG_SCMI_MSG_RESET_DOMAIN,y) 143$(call force,CFG_SCMI_MSG_SMT,y) 144$(call force,CFG_SCMI_MSG_VOLTAGE_DOMAIN,y) 145endif 146 147# Default enable some test facitilites 148CFG_ENABLE_EMBEDDED_TESTS ?= y 149CFG_WITH_STATS ?= y 150 151# Default disable some support for pager memory size constraint 152ifeq ($(CFG_WITH_PAGER),y) 153CFG_TEE_CORE_DEBUG ?= n 154CFG_UNWIND ?= n 155CFG_LOCKDEP ?= n 156CFG_CORE_ASLR ?= n 157CFG_TA_BGET_TEST ?= n 158endif 159 160# Non-secure UART and GPIO/pinctrl for the output console 161CFG_WITH_NSEC_GPIOS ?= y 162CFG_WITH_NSEC_UARTS ?= y 163# UART instance used for early console (0 disables early console) 164CFG_STM32_EARLY_CONSOLE_UART ?= 4 165