1 /* 2 * Copyright (c) 2016, Spreadtrum Communications Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <drivers/gic.h> 29 #include <kernel/generic_boot.h> 30 #include <kernel/panic.h> 31 #include <kernel/pm_stubs.h> 32 #include <mm/core_memprot.h> 33 #include <platform_config.h> 34 #include <trace.h> 35 #include <tee/entry_fast.h> 36 #include <tee/entry_std.h> 37 38 register_phys_mem(MEM_AREA_IO_NSEC, 39 ROUNDDOWN(CONSOLE_UART_BASE, CORE_MMU_DEVICE_SIZE), 40 CORE_MMU_DEVICE_SIZE); 41 42 register_phys_mem(MEM_AREA_IO_SEC, 43 ROUNDDOWN(GIC_BASE, CORE_MMU_DEVICE_SIZE), 44 CORE_MMU_DEVICE_SIZE); 45 46 register_phys_mem(MEM_AREA_IO_SEC, 47 ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_DEVICE_SIZE), 48 CORE_MMU_DEVICE_SIZE); 49 50 static void main_fiq(void); 51 52 static const struct thread_handlers handlers = { 53 .std_smc = tee_entry_std, 54 .fast_smc = tee_entry_fast, 55 .nintr = main_fiq, 56 .cpu_on = cpu_on_handler, 57 .cpu_off = pm_do_nothing, 58 .cpu_suspend = pm_do_nothing, 59 .cpu_resume = pm_do_nothing, 60 .system_off = pm_do_nothing, 61 .system_reset = pm_do_nothing, 62 }; 63 64 static struct gic_data gic_data; 65 66 const struct thread_handlers *generic_boot_get_handlers(void) 67 { 68 return &handlers; 69 } 70 71 void main_init_gic(void) 72 { 73 vaddr_t gicc_base; 74 vaddr_t gicd_base; 75 76 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, 77 MEM_AREA_IO_SEC); 78 gicd_base = (vaddr_t)phys_to_virt(GIC_BASE + GICD_OFFSET, 79 MEM_AREA_IO_SEC); 80 if (!gicc_base || !gicd_base) 81 panic(); 82 83 gic_init_base_addr(&gic_data, gicc_base, gicd_base); 84 85 itr_init(&gic_data.chip); 86 } 87 88 static void main_fiq(void) 89 { 90 gic_it_handle(&gic_data); 91 } 92