xref: /optee_os/core/arch/arm/plat-sam/scmi_server.c (revision ef3bc69c72b8d46493eab724eab6e018423088e1)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (c) 2019, STMicroelectronics
4  * Copyright (c) 2021, Microchip
5  */
6 
7 #include <at91_clk.h>
8 #include <confine_array_index.h>
9 #include <drivers/scmi-msg.h>
10 #include <drivers/scmi.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <initcall.h>
13 #include <tee_api_defines.h>
14 
15 static_assert(SMT_BUF_SLOT_SIZE <= CFG_SCMI_SHMEM_SIZE);
16 
17 register_phys_mem(MEM_AREA_IO_NSEC, CFG_SCMI_SHMEM_START, CFG_SCMI_SHMEM_SIZE);
18 
19 struct channel_resources {
20 	struct scmi_msg_channel *channel;
21 };
22 
23 static const struct channel_resources scmi_channel[] = {
24 	[0] = {
25 		.channel = &(struct scmi_msg_channel){
26 			.shm_addr = { .pa = CFG_SCMI_SHMEM_START },
27 			.shm_size = SMT_BUF_SLOT_SIZE,
28 		},
29 	},
30 };
31 
32 static const struct channel_resources *find_resource(unsigned int channel_id)
33 {
34 	assert(channel_id < ARRAY_SIZE(scmi_channel));
35 
36 	return scmi_channel + channel_id;
37 }
38 
39 struct scmi_msg_channel *plat_scmi_get_channel(unsigned int channel_id)
40 {
41 	const size_t max_id = ARRAY_SIZE(scmi_channel);
42 	unsigned int confined_id = confine_array_index(channel_id, max_id);
43 
44 	if (channel_id >= max_id)
45 		return NULL;
46 
47 	return find_resource(confined_id)->channel;
48 }
49 
50 static const char vendor[] = "Microchip";
51 static const char sub_vendor[] = "";
52 
53 const char *plat_scmi_vendor_name(void)
54 {
55 	return vendor;
56 }
57 
58 const char *plat_scmi_sub_vendor_name(void)
59 {
60 	return sub_vendor;
61 }
62 
63 /* Currently supporting only SCMI Base protocol */
64 static const uint8_t plat_protocol_list[] = {
65 	SCMI_PROTOCOL_ID_CLOCK,
66 	0 /* Null termination */
67 };
68 
69 size_t plat_scmi_protocol_count(void)
70 {
71 	return ARRAY_SIZE(plat_protocol_list) - 1;
72 }
73 
74 const uint8_t *plat_scmi_protocol_list(unsigned int channel_id __unused)
75 {
76 	return plat_protocol_list;
77 }
78 
79 struct sam_pmc_clk {
80 	unsigned int scmi_id;
81 	unsigned int pmc_type;
82 	unsigned int pmc_id;
83 };
84 
85 #ifdef CFG_SAMA7G5
86 static const struct sam_pmc_clk pmc_clks[] = {
87 	{
88 		.scmi_id = AT91_SCMI_CLK_CORE_MCK,
89 		.pmc_type = PMC_TYPE_CORE,
90 		.pmc_id = PMC_MCK
91 	},
92 	{
93 		.scmi_id = AT91_SCMI_CLK_CORE_UTMI,
94 		.pmc_type = PMC_TYPE_CORE,
95 		.pmc_id = PMC_UTMI
96 	},
97 	{
98 		.scmi_id = AT91_SCMI_CLK_CORE_CPUPLLCK,
99 		.pmc_type = PMC_TYPE_CORE,
100 		.pmc_id = PMC_CPUPLL
101 	},
102 	{
103 		.scmi_id = AT91_SCMI_CLK_CORE_MAIN,
104 		.pmc_type = PMC_TYPE_CORE,
105 		.pmc_id = PMC_MAIN
106 	},
107 	{
108 		.scmi_id = AT91_SCMI_CLK_CORE_SYSPLLCK,
109 		.pmc_type = PMC_TYPE_CORE,
110 		.pmc_id = PMC_SYSPLL
111 	},
112 
113 	{
114 		.scmi_id = AT91_SCMI_CLK_CORE_AUDIOPLLCK,
115 		.pmc_type = PMC_TYPE_CORE,
116 		.pmc_id = PMC_AUDIOPMCPLL
117 	},
118 
119 	{
120 		.scmi_id = AT91_SCMI_CLK_CORE_MCK_PRES,
121 		.pmc_type = PMC_TYPE_CORE,
122 		.pmc_id = PMC_MCK_PRES
123 	},
124 	{
125 		.scmi_id = AT91_SCMI_CLK_CORE_DDRPLLCK,
126 		.pmc_type = PMC_TYPE_CORE,
127 		.pmc_id = PMC_DDRPLL
128 	},
129 	{
130 		.scmi_id = AT91_SCMI_CLK_CORE_IMGPLLCK,
131 		.pmc_type = PMC_TYPE_CORE,
132 		.pmc_id = PMC_IMGPLL
133 	},
134 	{
135 		.scmi_id = AT91_SCMI_CLK_CORE_ETHPLLCK,
136 		.pmc_type = PMC_TYPE_CORE,
137 		.pmc_id = PMC_ETHPLL
138 	},
139 	{
140 		.scmi_id = AT91_SCMI_CLK_UTMI1,
141 		.pmc_type = PMC_TYPE_CORE,
142 		.pmc_id = PMC_UTMI1
143 	},
144 	{
145 		.scmi_id = AT91_SCMI_CLK_UTMI2,
146 		.pmc_type = PMC_TYPE_CORE,
147 		.pmc_id = PMC_UTMI2
148 	},
149 	{
150 		.scmi_id = AT91_SCMI_CLK_UTMI3,
151 		.pmc_type = PMC_TYPE_CORE,
152 		.pmc_id = PMC_UTMI3
153 	},
154 	{
155 		.scmi_id = AT91_SCMI_CLK_SYSTEM_PCK0,
156 		.pmc_type = PMC_TYPE_SYSTEM,
157 		.pmc_id = 8
158 	},
159 	{
160 		.scmi_id = AT91_SCMI_CLK_SYSTEM_PCK1,
161 		.pmc_type = PMC_TYPE_SYSTEM,
162 		.pmc_id = 9
163 	},
164 	{
165 		.scmi_id = AT91_SCMI_CLK_SYSTEM_PCK2,
166 		.pmc_type = PMC_TYPE_SYSTEM,
167 		.pmc_id = 10
168 	},
169 	{
170 		.scmi_id = AT91_SCMI_CLK_SYSTEM_PCK3,
171 		.pmc_type = PMC_TYPE_SYSTEM,
172 		.pmc_id = 11
173 	},
174 	{
175 		.scmi_id = AT91_SCMI_CLK_SYSTEM_PCK4,
176 		.pmc_type = PMC_TYPE_SYSTEM,
177 		.pmc_id = 12
178 	},
179 	{
180 		.scmi_id = AT91_SCMI_CLK_SYSTEM_PCK5,
181 		.pmc_type = PMC_TYPE_SYSTEM,
182 		.pmc_id = 13
183 	},
184 	{
185 		.scmi_id = AT91_SCMI_CLK_SYSTEM_PCK6,
186 		.pmc_type = PMC_TYPE_SYSTEM,
187 		.pmc_id = 14
188 	},
189 	{
190 		.scmi_id = AT91_SCMI_CLK_SYSTEM_PCK7,
191 		.pmc_type = PMC_TYPE_SYSTEM,
192 		.pmc_id = 15
193 	},
194 	{
195 		.scmi_id = AT91_SCMI_CLK_PERIPH_ASRC_CLK,
196 		.pmc_type = PMC_TYPE_PERIPHERAL,
197 		.pmc_id = ID_ASRC
198 	},
199 	{
200 		.scmi_id = AT91_SCMI_CLK_GCK_ASRC_GCLK,
201 		.pmc_type = PMC_TYPE_GCK,
202 		.pmc_id = ID_ASRC
203 	},
204 	{
205 		.scmi_id = AT91_SCMI_CLK_PERIPH_CSI_CLK,
206 		.pmc_type = PMC_TYPE_PERIPHERAL,
207 		.pmc_id = ID_CSI
208 	},
209 	{
210 		.scmi_id = AT91_SCMI_CLK_GCK_CSI_GCLK,
211 		.pmc_type = PMC_TYPE_GCK,
212 		.pmc_id = ID_CSI
213 	},
214 	{
215 		.scmi_id = AT91_SCMI_CLK_PERIPH_CSI2DC_CLK,
216 		.pmc_type = PMC_TYPE_PERIPHERAL,
217 		.pmc_id = ID_CSI2DC
218 	},
219 	{
220 		.scmi_id = AT91_SCMI_CLK_PERIPH_MACB0_CLK,
221 		.pmc_type = PMC_TYPE_PERIPHERAL,
222 		.pmc_id = ID_GMAC0
223 	},
224 	{
225 		.scmi_id = AT91_SCMI_CLK_GCK_MACB0_GCLK,
226 		.pmc_type = PMC_TYPE_GCK,
227 		.pmc_id = ID_GMAC0
228 	},
229 	{
230 		.scmi_id = AT91_SCMI_CLK_GCK_MACB0_TSU,
231 		.pmc_type = PMC_TYPE_GCK,
232 		.pmc_id = ID_GMAC0_TSU
233 	},
234 	{
235 		.scmi_id = AT91_SCMI_CLK_PERIPH_MACB1_CLK,
236 		.pmc_type = PMC_TYPE_PERIPHERAL,
237 		.pmc_id = ID_GMAC1
238 	},
239 	{
240 		.scmi_id = AT91_SCMI_CLK_GCK_MACB1_GCLK,
241 		.pmc_type = PMC_TYPE_GCK,
242 		.pmc_id = ID_GMAC1
243 	},
244 	{
245 		.scmi_id = AT91_SCMI_CLK_GCK_MACB1_TSU,
246 		.pmc_type = PMC_TYPE_GCK,
247 		.pmc_id = ID_GMAC1_TSU
248 	},
249 	{
250 		.scmi_id = AT91_SCMI_CLK_PERIPH_TDES_CLK,
251 		.pmc_type = PMC_TYPE_PERIPHERAL,
252 		.pmc_id = ID_TDES
253 	},
254 	{
255 		.scmi_id = AT91_SCMI_CLK_PERIPH_HSMC_CLK,
256 		.pmc_type = PMC_TYPE_PERIPHERAL,
257 		.pmc_id = ID_HSMC
258 	},
259 	{
260 		.scmi_id = AT91_SCMI_CLK_PERIPH_PIOA_CLK,
261 		.pmc_type = PMC_TYPE_PERIPHERAL,
262 		.pmc_id = ID_PIOA
263 	},
264 	{
265 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX0_CLK,
266 		.pmc_type = PMC_TYPE_PERIPHERAL,
267 		.pmc_id = ID_FLEXCOM0
268 	},
269 	{
270 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX1_CLK,
271 		.pmc_type = PMC_TYPE_PERIPHERAL,
272 		.pmc_id = ID_FLEXCOM1
273 	},
274 	{
275 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX2_CLK,
276 		.pmc_type = PMC_TYPE_PERIPHERAL,
277 		.pmc_id = ID_FLEXCOM2
278 	},
279 	{
280 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX3_CLK,
281 		.pmc_type = PMC_TYPE_PERIPHERAL,
282 		.pmc_id = ID_FLEXCOM3
283 	},
284 	{
285 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX4_CLK,
286 		.pmc_type = PMC_TYPE_PERIPHERAL,
287 		.pmc_id = ID_FLEXCOM4
288 	},
289 	{
290 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX5_CLK,
291 		.pmc_type = PMC_TYPE_PERIPHERAL,
292 		.pmc_id = ID_FLEXCOM5
293 	},
294 	{
295 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX6_CLK,
296 		.pmc_type = PMC_TYPE_PERIPHERAL,
297 		.pmc_id = ID_FLEXCOM6
298 	},
299 	{
300 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX7_CLK,
301 		.pmc_type = PMC_TYPE_PERIPHERAL,
302 		.pmc_id = ID_FLEXCOM7
303 	},
304 	{
305 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX8_CLK,
306 		.pmc_type = PMC_TYPE_PERIPHERAL,
307 		.pmc_id = ID_FLEXCOM8
308 	},
309 	{
310 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX9_CLK,
311 		.pmc_type = PMC_TYPE_PERIPHERAL,
312 		.pmc_id = ID_FLEXCOM9
313 	},
314 	{
315 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX10_CLK,
316 		.pmc_type = PMC_TYPE_PERIPHERAL,
317 		.pmc_id = ID_FLEXCOM10
318 	},
319 	{
320 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX11_CLK,
321 		.pmc_type = PMC_TYPE_PERIPHERAL,
322 		.pmc_id = ID_FLEXCOM11
323 	},
324 	{
325 		.scmi_id = AT91_SCMI_CLK_PERIPH_TCB0_CLK,
326 		.pmc_type = PMC_TYPE_PERIPHERAL,
327 		.pmc_id = ID_TC0_CHANNEL0
328 	},
329 	{
330 		.scmi_id = AT91_SCMI_CLK_PERIPH_TCB1_CLK,
331 		.pmc_type = PMC_TYPE_PERIPHERAL,
332 		.pmc_id = ID_TC1_CHANNEL0
333 	},
334 	{
335 		.scmi_id = AT91_SCMI_CLK_PERIPH_PWM_CLK,
336 		.pmc_type = PMC_TYPE_PERIPHERAL,
337 		.pmc_id = ID_PWM
338 	},
339 	{
340 		.scmi_id = AT91_SCMI_CLK_GCK_ADC_GCLK,
341 		.pmc_type = PMC_TYPE_GCK,
342 		.pmc_id = ID_ADC
343 	},
344 	{
345 		.scmi_id = AT91_SCMI_CLK_PERIPH_UHPHS_CLK,
346 		.pmc_type = PMC_TYPE_PERIPHERAL,
347 		.pmc_id = ID_UHPHS
348 	},
349 	{
350 		.scmi_id = AT91_SCMI_CLK_PERIPH_UDPHSA_CLK,
351 		.pmc_type = PMC_TYPE_PERIPHERAL,
352 		.pmc_id = ID_UDPHSA
353 	},
354 	{
355 		.scmi_id = AT91_SCMI_CLK_PERIPH_UDPHSB_CLK,
356 		.pmc_type = PMC_TYPE_PERIPHERAL,
357 		.pmc_id = ID_UDPHSB
358 	},
359 	{
360 		.scmi_id = AT91_SCMI_CLK_PERIPH_SSC0_CLK,
361 		.pmc_type = PMC_TYPE_PERIPHERAL,
362 		.pmc_id = ID_SSC0
363 	},
364 	{
365 		.scmi_id = AT91_SCMI_CLK_PERIPH_SSC1_CLK,
366 		.pmc_type = PMC_TYPE_PERIPHERAL,
367 		.pmc_id = ID_SSC1
368 	},
369 	{
370 		.scmi_id = AT91_SCMI_CLK_PERIPH_TRNG_CLK,
371 		.pmc_type = PMC_TYPE_PERIPHERAL,
372 		.pmc_id = ID_TRNG
373 	},
374 	{
375 		.scmi_id = AT91_SCMI_CLK_PERIPH_PDMC0_CLK,
376 		.pmc_type = PMC_TYPE_PERIPHERAL,
377 		.pmc_id = ID_PDMC0
378 	},
379 	{
380 		.scmi_id = AT91_SCMI_CLK_PERIPH_PDMC1_CLK,
381 		.pmc_type = PMC_TYPE_PERIPHERAL,
382 		.pmc_id = ID_PDMC1
383 	},
384 	{
385 		.scmi_id = AT91_SCMI_CLK_PERIPH_SECURAM_CLK,
386 		.pmc_type = PMC_TYPE_PERIPHERAL,
387 		.pmc_id = ID_SECURAM
388 	},
389 	{
390 		.scmi_id = AT91_SCMI_CLK_PERIPH_I2S0_CLK,
391 		.pmc_type = PMC_TYPE_PERIPHERAL,
392 		.pmc_id = ID_I2SMCC0
393 	},
394 	{
395 		.scmi_id = AT91_SCMI_CLK_PERIPH_I2S1_CLK,
396 		.pmc_type = PMC_TYPE_PERIPHERAL,
397 		.pmc_id = ID_I2SMCC1
398 	},
399 	{
400 		.scmi_id = AT91_SCMI_CLK_PERIPH_CAN0_CLK,
401 		.pmc_type = PMC_TYPE_PERIPHERAL,
402 		.pmc_id = ID_MCAN0
403 	},
404 	{
405 		.scmi_id = AT91_SCMI_CLK_PERIPH_CAN1_CLK,
406 		.pmc_type = PMC_TYPE_PERIPHERAL,
407 		.pmc_id = ID_MCAN1
408 	},
409 	{
410 		.scmi_id = AT91_SCMI_CLK_PERIPH_CAN2_CLK,
411 		.pmc_type = PMC_TYPE_PERIPHERAL,
412 		.pmc_id = ID_MCAN2
413 	},
414 	{
415 		.scmi_id = AT91_SCMI_CLK_PERIPH_CAN3_CLK,
416 		.pmc_type = PMC_TYPE_PERIPHERAL,
417 		.pmc_id = ID_MCAN3
418 	},
419 	{
420 		.scmi_id = AT91_SCMI_CLK_PERIPH_CAN4_CLK,
421 		.pmc_type = PMC_TYPE_PERIPHERAL,
422 		.pmc_id = ID_MCAN4
423 	},
424 	{
425 		.scmi_id = AT91_SCMI_CLK_PERIPH_CAN5_CLK,
426 		.pmc_type = PMC_TYPE_PERIPHERAL,
427 		.pmc_id = ID_MCAN5
428 	},
429 	{
430 		.scmi_id = AT91_SCMI_CLK_PERIPH_DMA0_CLK,
431 		.pmc_type = PMC_TYPE_PERIPHERAL,
432 		.pmc_id = ID_XDMAC0
433 	},
434 	{
435 		.scmi_id = AT91_SCMI_CLK_PERIPH_DMA1_CLK,
436 		.pmc_type = PMC_TYPE_PERIPHERAL,
437 		.pmc_id = ID_XDMAC1
438 	},
439 	{
440 		.scmi_id = AT91_SCMI_CLK_PERIPH_DMA2_CLK,
441 		.pmc_type = PMC_TYPE_PERIPHERAL,
442 		.pmc_id = ID_XDMAC2
443 	},
444 	{
445 		.scmi_id = AT91_SCMI_CLK_PERIPH_SPDIFRX_CLK,
446 		.pmc_type = PMC_TYPE_PERIPHERAL,
447 		.pmc_id = ID_SPDIFRX
448 	},
449 	{
450 		.scmi_id = AT91_SCMI_CLK_PERIPH_SPDIFTX_CLK,
451 		.pmc_type = PMC_TYPE_PERIPHERAL,
452 		.pmc_id = ID_SPDIFTX
453 	},
454 	{
455 		.scmi_id = AT91_SCMI_CLK_GCK_SPDIFRX_GCLK,
456 		.pmc_type = PMC_TYPE_GCK,
457 		.pmc_id = ID_SPDIFRX
458 	},
459 	{
460 		.scmi_id = AT91_SCMI_CLK_GCK_SPDIFTX_GCLK,
461 		.pmc_type = PMC_TYPE_GCK,
462 		.pmc_id = ID_SPDIFTX
463 	},
464 	{
465 		.scmi_id = AT91_SCMI_CLK_PERIPH_AES_CLK,
466 		.pmc_type = PMC_TYPE_PERIPHERAL,
467 		.pmc_id = ID_AES
468 	},
469 	{
470 		.scmi_id = AT91_SCMI_CLK_PERIPH_AESB_CLK,
471 		.pmc_type = PMC_TYPE_PERIPHERAL,
472 		.pmc_id = ID_TZAESBASC
473 	},
474 	{
475 		.scmi_id = AT91_SCMI_CLK_PERIPH_SHA_CLK,
476 		.pmc_type = PMC_TYPE_PERIPHERAL,
477 		.pmc_id = ID_SHA
478 	},
479 	{
480 		.scmi_id = AT91_SCMI_CLK_PERIPH_SDMMC0_HCLK,
481 		.pmc_type = PMC_TYPE_PERIPHERAL,
482 		.pmc_id = ID_SDMMC0
483 	},
484 	{
485 		.scmi_id = AT91_SCMI_CLK_PERIPH_SDMMC1_HCLK,
486 		.pmc_type = PMC_TYPE_PERIPHERAL,
487 		.pmc_id = ID_SDMMC1
488 	},
489 	{
490 		.scmi_id = AT91_SCMI_CLK_PERIPH_SDMMC2_HCLK,
491 		.pmc_type = PMC_TYPE_PERIPHERAL,
492 		.pmc_id = ID_SDMMC2
493 	},
494 	{
495 		.scmi_id = AT91_SCMI_CLK_PERIPH_ISC_CLK,
496 		.pmc_type = PMC_TYPE_PERIPHERAL,
497 		.pmc_id = ID_ISC
498 	},
499 	{
500 		.scmi_id = AT91_SCMI_CLK_PERIPH_QSPI0_CLK,
501 		.pmc_type = PMC_TYPE_PERIPHERAL,
502 		.pmc_id = ID_QSPI0
503 	},
504 	{
505 		.scmi_id = AT91_SCMI_CLK_PERIPH_QSPI1_CLK,
506 		.pmc_type = PMC_TYPE_PERIPHERAL,
507 		.pmc_id = ID_QSPI1
508 	},
509 	{
510 		.scmi_id = AT91_SCMI_CLK_GCK_QSPI0_GCLK,
511 		.pmc_type = PMC_TYPE_GCK,
512 		.pmc_id = ID_QSPI0
513 	},
514 	{
515 		.scmi_id = AT91_SCMI_CLK_GCK_QSPI1_GCLK,
516 		.pmc_type = PMC_TYPE_GCK,
517 		.pmc_id = ID_QSPI1
518 	},
519 	{
520 		.scmi_id = AT91_SCMI_CLK_GCK_SDMMC0_GCLK,
521 		.pmc_type = PMC_TYPE_GCK,
522 		.pmc_id = ID_SDMMC0
523 	},
524 	{
525 		.scmi_id = AT91_SCMI_CLK_GCK_SDMMC1_GCLK,
526 		.pmc_type = PMC_TYPE_GCK,
527 		.pmc_id = ID_SDMMC1
528 	},
529 	{
530 		.scmi_id = AT91_SCMI_CLK_GCK_SDMMC2_GCLK,
531 		.pmc_type = PMC_TYPE_GCK,
532 		.pmc_id = ID_SDMMC2
533 	},
534 	{
535 		.scmi_id = AT91_SCMI_CLK_GCK_TCB0_GCLK,
536 		.pmc_type = PMC_TYPE_GCK,
537 		.pmc_id = ID_TC0_CHANNEL0
538 	},
539 	{
540 		.scmi_id = AT91_SCMI_CLK_GCK_TCB1_GCLK,
541 		.pmc_type = PMC_TYPE_GCK,
542 		.pmc_id = ID_TC1_CHANNEL0
543 	},
544 	{
545 		.scmi_id = AT91_SCMI_CLK_GCK_I2S0_GCLK,
546 		.pmc_type = PMC_TYPE_GCK,
547 		.pmc_id = ID_I2SMCC0
548 	},
549 	{
550 		.scmi_id = AT91_SCMI_CLK_GCK_I2S1_GCLK,
551 		.pmc_type = PMC_TYPE_GCK,
552 		.pmc_id = ID_I2SMCC1
553 	},
554 	{
555 		.scmi_id = AT91_SCMI_CLK_GCK_CAN0_GCLK,
556 		.pmc_type = PMC_TYPE_GCK,
557 		.pmc_id = ID_MCAN0
558 	},
559 	{
560 		.scmi_id = AT91_SCMI_CLK_GCK_CAN1_GCLK,
561 		.pmc_type = PMC_TYPE_GCK,
562 		.pmc_id = ID_MCAN1
563 	},
564 	{
565 		.scmi_id = AT91_SCMI_CLK_GCK_CAN2_GCLK,
566 		.pmc_type = PMC_TYPE_GCK,
567 		.pmc_id = ID_MCAN2
568 	},
569 	{
570 		.scmi_id = AT91_SCMI_CLK_GCK_CAN3_GCLK,
571 		.pmc_type = PMC_TYPE_GCK,
572 		.pmc_id = ID_MCAN3
573 	},
574 	{
575 		.scmi_id = AT91_SCMI_CLK_GCK_CAN4_GCLK,
576 		.pmc_type = PMC_TYPE_GCK,
577 		.pmc_id = ID_MCAN4
578 	},
579 	{
580 		.scmi_id = AT91_SCMI_CLK_GCK_CAN5_GCLK,
581 		.pmc_type = PMC_TYPE_GCK,
582 		.pmc_id = ID_MCAN5
583 	},
584 };
585 #else
586 static const struct sam_pmc_clk pmc_clks[] = {
587 	{
588 		.scmi_id = AT91_SCMI_CLK_CORE_MCK,
589 		.pmc_type = PMC_TYPE_CORE,
590 		.pmc_id = PMC_MCK
591 	},
592 	{
593 		.scmi_id = AT91_SCMI_CLK_CORE_UTMI,
594 		.pmc_type = PMC_TYPE_CORE,
595 		.pmc_id = PMC_UTMI
596 	},
597 	{
598 		.scmi_id = AT91_SCMI_CLK_CORE_MAIN,
599 		.pmc_type = PMC_TYPE_CORE,
600 		.pmc_id = PMC_MAIN
601 	},
602 	{
603 		.scmi_id = AT91_SCMI_CLK_CORE_MCK2,
604 		.pmc_type = PMC_TYPE_CORE,
605 		.pmc_id = PMC_MCK2
606 	},
607 	{
608 		.scmi_id = AT91_SCMI_CLK_CORE_I2S0_MUX,
609 		.pmc_type = PMC_TYPE_CORE,
610 		.pmc_id = PMC_I2S0_MUX
611 	},
612 	{
613 		.scmi_id = AT91_SCMI_CLK_CORE_I2S1_MUX,
614 		.pmc_type = PMC_TYPE_CORE,
615 		.pmc_id = PMC_I2S1_MUX
616 	},
617 	{
618 		.scmi_id = AT91_SCMI_CLK_CORE_PLLACK,
619 		.pmc_type = PMC_TYPE_CORE,
620 		.pmc_id = PMC_PLLACK
621 	},
622 	{
623 		.scmi_id = AT91_SCMI_CLK_CORE_AUDIOPLLCK,
624 		.pmc_type = PMC_TYPE_CORE,
625 		.pmc_id = PMC_AUDIOPLLCK
626 	},
627 	{
628 		.scmi_id = AT91_SCMI_CLK_CORE_MCK_PRES,
629 		.pmc_type = PMC_TYPE_CORE,
630 		.pmc_id = PMC_MCK_PRES
631 	},
632 	{
633 		.scmi_id = AT91_SCMI_CLK_SYSTEM_DDRCK,
634 		.pmc_type = PMC_TYPE_SYSTEM,
635 		.pmc_id = 2
636 	},
637 	{
638 		.scmi_id = AT91_SCMI_CLK_SYSTEM_LCDCK,
639 		.pmc_type = PMC_TYPE_SYSTEM,
640 		.pmc_id = 3
641 	},
642 	{
643 		.scmi_id = AT91_SCMI_CLK_SYSTEM_UHPCK,
644 		.pmc_type = PMC_TYPE_SYSTEM,
645 		.pmc_id = 6
646 	},
647 	{
648 		.scmi_id = AT91_SCMI_CLK_SYSTEM_UDPCK,
649 		.pmc_type = PMC_TYPE_SYSTEM,
650 		.pmc_id = 7
651 	},
652 	{
653 		.scmi_id = AT91_SCMI_CLK_SYSTEM_PCK0,
654 		.pmc_type = PMC_TYPE_SYSTEM,
655 		.pmc_id = 8
656 	},
657 	{
658 		.scmi_id = AT91_SCMI_CLK_SYSTEM_PCK1,
659 		.pmc_type = PMC_TYPE_SYSTEM,
660 		.pmc_id = 9
661 	},
662 	{
663 		.scmi_id = AT91_SCMI_CLK_SYSTEM_PCK2,
664 		.pmc_type = PMC_TYPE_SYSTEM,
665 		.pmc_id = 10
666 	},
667 	{
668 		.scmi_id = AT91_SCMI_CLK_SYSTEM_ISCCK,
669 		.pmc_type = PMC_TYPE_SYSTEM,
670 		.pmc_id = 18
671 	},
672 	{
673 		.scmi_id = AT91_SCMI_CLK_PERIPH_MACB0_CLK,
674 		.pmc_type = PMC_TYPE_PERIPHERAL,
675 		.pmc_id = 5
676 	},
677 	{
678 		.scmi_id = AT91_SCMI_CLK_PERIPH_TDES_CLK,
679 		.pmc_type = PMC_TYPE_PERIPHERAL,
680 		.pmc_id = 11
681 	},
682 	{
683 		.scmi_id = AT91_SCMI_CLK_PERIPH_MATRIX1_CLK,
684 		.pmc_type = PMC_TYPE_PERIPHERAL,
685 		.pmc_id = 14
686 	},
687 	{
688 		.scmi_id = AT91_SCMI_CLK_PERIPH_HSMC_CLK,
689 		.pmc_type = PMC_TYPE_PERIPHERAL,
690 		.pmc_id = 17
691 	},
692 	{
693 		.scmi_id = AT91_SCMI_CLK_PERIPH_PIOA_CLK,
694 		.pmc_type = PMC_TYPE_PERIPHERAL,
695 		.pmc_id = 18
696 	},
697 	{
698 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX0_CLK,
699 		.pmc_type = PMC_TYPE_PERIPHERAL,
700 		.pmc_id = 19
701 	},
702 	{
703 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX1_CLK,
704 		.pmc_type = PMC_TYPE_PERIPHERAL,
705 		.pmc_id = 20
706 	},
707 	{
708 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX2_CLK,
709 		.pmc_type = PMC_TYPE_PERIPHERAL,
710 		.pmc_id = 21
711 	},
712 	{
713 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX3_CLK,
714 		.pmc_type = PMC_TYPE_PERIPHERAL,
715 		.pmc_id = 22
716 	},
717 	{
718 		.scmi_id = AT91_SCMI_CLK_PERIPH_FLX4_CLK,
719 		.pmc_type = PMC_TYPE_PERIPHERAL,
720 		.pmc_id = 23
721 	},
722 	{
723 		.scmi_id = AT91_SCMI_CLK_PERIPH_UART0_CLK,
724 		.pmc_type = PMC_TYPE_PERIPHERAL,
725 		.pmc_id = 24
726 	},
727 	{
728 		.scmi_id = AT91_SCMI_CLK_PERIPH_UART1_CLK,
729 		.pmc_type = PMC_TYPE_PERIPHERAL,
730 		.pmc_id = 25
731 	},
732 	{
733 		.scmi_id = AT91_SCMI_CLK_PERIPH_UART2_CLK,
734 		.pmc_type = PMC_TYPE_PERIPHERAL,
735 		.pmc_id = 26
736 	},
737 	{
738 		.scmi_id = AT91_SCMI_CLK_PERIPH_UART3_CLK,
739 		.pmc_type = PMC_TYPE_PERIPHERAL,
740 		.pmc_id = 27
741 	},
742 	{
743 		.scmi_id = AT91_SCMI_CLK_PERIPH_UART4_CLK,
744 		.pmc_type = PMC_TYPE_PERIPHERAL,
745 		.pmc_id = 28
746 	},
747 	{
748 		.scmi_id = AT91_SCMI_CLK_PERIPH_TWI0_CLK,
749 		.pmc_type = PMC_TYPE_PERIPHERAL,
750 		.pmc_id = 29
751 	},
752 	{
753 		.scmi_id = AT91_SCMI_CLK_PERIPH_TWI1_CLK,
754 		.pmc_type = PMC_TYPE_PERIPHERAL,
755 		.pmc_id = 30
756 	},
757 	{
758 		.scmi_id = AT91_SCMI_CLK_PERIPH_SPI0_CLK,
759 		.pmc_type = PMC_TYPE_PERIPHERAL,
760 		.pmc_id = 33
761 	},
762 	{
763 		.scmi_id = AT91_SCMI_CLK_PERIPH_SPI1_CLK,
764 		.pmc_type = PMC_TYPE_PERIPHERAL,
765 		.pmc_id = 34
766 	},
767 	{
768 		.scmi_id = AT91_SCMI_CLK_PERIPH_TCB0_CLK,
769 		.pmc_type = PMC_TYPE_PERIPHERAL,
770 		.pmc_id = 35
771 	},
772 	{
773 		.scmi_id = AT91_SCMI_CLK_PERIPH_TCB1_CLK,
774 		.pmc_type = PMC_TYPE_PERIPHERAL,
775 		.pmc_id = 36
776 	},
777 	{
778 		.scmi_id = AT91_SCMI_CLK_PERIPH_PWM_CLK,
779 		.pmc_type = PMC_TYPE_PERIPHERAL,
780 		.pmc_id = 38
781 	},
782 	{
783 		.scmi_id = AT91_SCMI_CLK_PERIPH_ADC_CLK,
784 		.pmc_type = PMC_TYPE_PERIPHERAL,
785 		.pmc_id = 40
786 	},
787 	{
788 		.scmi_id = AT91_SCMI_CLK_PERIPH_UHPHS_CLK,
789 		.pmc_type = PMC_TYPE_PERIPHERAL,
790 		.pmc_id = 41
791 	},
792 	{
793 		.scmi_id = AT91_SCMI_CLK_PERIPH_UDPHS_CLK,
794 		.pmc_type = PMC_TYPE_PERIPHERAL,
795 		.pmc_id = 42
796 	},
797 	{
798 		.scmi_id = AT91_SCMI_CLK_PERIPH_SSC0_CLK,
799 		.pmc_type = PMC_TYPE_PERIPHERAL,
800 		.pmc_id = 43
801 	},
802 	{
803 		.scmi_id = AT91_SCMI_CLK_PERIPH_SSC1_CLK,
804 		.pmc_type = PMC_TYPE_PERIPHERAL,
805 		.pmc_id = 44
806 	},
807 	{
808 		.scmi_id = AT91_SCMI_CLK_PERIPH_TRNG_CLK,
809 		.pmc_type = PMC_TYPE_PERIPHERAL,
810 		.pmc_id = 47
811 	},
812 	{
813 		.scmi_id = AT91_SCMI_CLK_PERIPH_PDMIC_CLK,
814 		.pmc_type = PMC_TYPE_PERIPHERAL,
815 		.pmc_id = 48
816 	},
817 	{
818 		.scmi_id = AT91_SCMI_CLK_PERIPH_SECURAM_CLK,
819 		.pmc_type = PMC_TYPE_PERIPHERAL,
820 		.pmc_id = 51
821 	},
822 	{
823 		.scmi_id = AT91_SCMI_CLK_PERIPH_I2S0_CLK,
824 		.pmc_type = PMC_TYPE_PERIPHERAL,
825 		.pmc_id = 54
826 	},
827 	{
828 		.scmi_id = AT91_SCMI_CLK_PERIPH_I2S1_CLK,
829 		.pmc_type = PMC_TYPE_PERIPHERAL,
830 		.pmc_id = 55
831 	},
832 	{
833 		.scmi_id = AT91_SCMI_CLK_PERIPH_CAN0_CLK,
834 		.pmc_type = PMC_TYPE_PERIPHERAL,
835 		.pmc_id = 56
836 	},
837 	{
838 		.scmi_id = AT91_SCMI_CLK_PERIPH_CAN1_CLK,
839 		.pmc_type = PMC_TYPE_PERIPHERAL,
840 		.pmc_id = 57
841 	},
842 	{
843 		.scmi_id = AT91_SCMI_CLK_PERIPH_PTC_CLK,
844 		.pmc_type = PMC_TYPE_PERIPHERAL,
845 		.pmc_id = 58
846 	},
847 	{
848 		.scmi_id = AT91_SCMI_CLK_PERIPH_CLASSD_CLK,
849 		.pmc_type = PMC_TYPE_PERIPHERAL,
850 		.pmc_id = 59
851 	},
852 	{
853 		.scmi_id = AT91_SCMI_CLK_PERIPH_DMA0_CLK,
854 		.pmc_type = PMC_TYPE_PERIPHERAL,
855 		.pmc_id = 6
856 	},
857 	{
858 		.scmi_id = AT91_SCMI_CLK_PERIPH_DMA1_CLK,
859 		.pmc_type = PMC_TYPE_PERIPHERAL,
860 		.pmc_id = 7
861 	},
862 	{
863 		.scmi_id = AT91_SCMI_CLK_PERIPH_AES_CLK,
864 		.pmc_type = PMC_TYPE_PERIPHERAL,
865 		.pmc_id = 9
866 	},
867 	{
868 		.scmi_id = AT91_SCMI_CLK_PERIPH_AESB_CLK,
869 		.pmc_type = PMC_TYPE_PERIPHERAL,
870 		.pmc_id = 10
871 	},
872 	{
873 		.scmi_id = AT91_SCMI_CLK_PERIPH_SHA_CLK,
874 		.pmc_type = PMC_TYPE_PERIPHERAL,
875 		.pmc_id = 12
876 	},
877 	{
878 		.scmi_id = AT91_SCMI_CLK_PERIPH_MPDDR_CLK,
879 		.pmc_type = PMC_TYPE_PERIPHERAL,
880 		.pmc_id = 13
881 	},
882 	{
883 		.scmi_id = AT91_SCMI_CLK_PERIPH_MATRIX0_CLK,
884 		.pmc_type = PMC_TYPE_PERIPHERAL,
885 		.pmc_id = 15
886 	},
887 	{
888 		.scmi_id = AT91_SCMI_CLK_PERIPH_SDMMC0_HCLK,
889 		.pmc_type = PMC_TYPE_PERIPHERAL,
890 		.pmc_id = 31
891 	},
892 	{
893 		.scmi_id = AT91_SCMI_CLK_PERIPH_SDMMC1_HCLK,
894 		.pmc_type = PMC_TYPE_PERIPHERAL,
895 		.pmc_id = 32
896 	},
897 	{
898 		.scmi_id = AT91_SCMI_CLK_PERIPH_LCDC_CLK,
899 		.pmc_type = PMC_TYPE_PERIPHERAL,
900 		.pmc_id = 45
901 	},
902 	{
903 		.scmi_id = AT91_SCMI_CLK_PERIPH_ISC_CLK,
904 		.pmc_type = PMC_TYPE_PERIPHERAL,
905 		.pmc_id = 46
906 	},
907 	{
908 		.scmi_id = AT91_SCMI_CLK_PERIPH_QSPI0_CLK,
909 		.pmc_type = PMC_TYPE_PERIPHERAL,
910 		.pmc_id = 52
911 	},
912 	{
913 		.scmi_id = AT91_SCMI_CLK_PERIPH_QSPI1_CLK,
914 		.pmc_type = PMC_TYPE_PERIPHERAL,
915 		.pmc_id = 53
916 	},
917 	{
918 		.scmi_id = AT91_SCMI_CLK_GCK_SDMMC0_GCLK,
919 		.pmc_type = PMC_TYPE_GCK,
920 		.pmc_id = 31
921 	},
922 	{
923 		.scmi_id = AT91_SCMI_CLK_GCK_SDMMC1_GCLK,
924 		.pmc_type = PMC_TYPE_GCK,
925 		.pmc_id = 32
926 	},
927 	{
928 		.scmi_id = AT91_SCMI_CLK_GCK_TCB0_GCLK,
929 		.pmc_type = PMC_TYPE_GCK,
930 		.pmc_id = 35
931 	},
932 	{
933 		.scmi_id = AT91_SCMI_CLK_GCK_TCB1_GCLK,
934 		.pmc_type = PMC_TYPE_GCK,
935 		.pmc_id = 36
936 	},
937 	{
938 		.scmi_id = AT91_SCMI_CLK_GCK_PWM_GCLK,
939 		.pmc_type = PMC_TYPE_GCK,
940 		.pmc_id = 38
941 	},
942 	{
943 		.scmi_id = AT91_SCMI_CLK_GCK_ISC_GCLK,
944 		.pmc_type = PMC_TYPE_GCK,
945 		.pmc_id = 46
946 	},
947 	{
948 		.scmi_id = AT91_SCMI_CLK_GCK_PDMIC_GCLK,
949 		.pmc_type = PMC_TYPE_GCK,
950 		.pmc_id = 48
951 	},
952 	{
953 		.scmi_id = AT91_SCMI_CLK_GCK_I2S0_GCLK,
954 		.pmc_type = PMC_TYPE_GCK,
955 		.pmc_id = 54
956 	},
957 	{
958 		.scmi_id = AT91_SCMI_CLK_GCK_I2S1_GCLK,
959 		.pmc_type = PMC_TYPE_GCK,
960 		.pmc_id = 55
961 	},
962 	{
963 		.scmi_id = AT91_SCMI_CLK_GCK_CAN0_GCLK,
964 		.pmc_type = PMC_TYPE_GCK,
965 		.pmc_id = 56
966 	},
967 	{
968 		.scmi_id = AT91_SCMI_CLK_GCK_CAN1_GCLK,
969 		.pmc_type = PMC_TYPE_GCK,
970 		.pmc_id = 57
971 	},
972 	{
973 		.scmi_id = AT91_SCMI_CLK_GCK_CLASSD_GCLK,
974 		.pmc_type = PMC_TYPE_GCK,
975 		.pmc_id = 59
976 	},
977 	{
978 		.scmi_id = AT91_SCMI_CLK_PROG_PROG0,
979 		.pmc_type = PMC_TYPE_PROGRAMMABLE,
980 		.pmc_id = 0
981 	},
982 	{
983 		.scmi_id = AT91_SCMI_CLK_PROG_PROG1,
984 		.pmc_type = PMC_TYPE_PROGRAMMABLE,
985 		.pmc_id = 1
986 	},
987 	{
988 		.scmi_id = AT91_SCMI_CLK_PROG_PROG2,
989 		.pmc_type = PMC_TYPE_PROGRAMMABLE,
990 		.pmc_id = 2
991 	},
992 };
993 #endif
994 
995 static TEE_Result sam_init_scmi_clk(void)
996 {
997 	unsigned int i = 0;
998 	struct clk *clk = NULL;
999 	TEE_Result res = TEE_ERROR_GENERIC;
1000 	const struct sam_pmc_clk *pmc_clk = NULL;
1001 
1002 	for (i = 0; i < ARRAY_SIZE(pmc_clks); i++) {
1003 		pmc_clk = &pmc_clks[i];
1004 		res = at91_pmc_clk_get(pmc_clk->pmc_type, pmc_clk->pmc_id,
1005 				       &clk);
1006 		if (res) {
1007 			EMSG("Failed to get PMC clock type %u, id %u",
1008 			     pmc_clk->pmc_type, pmc_clk->pmc_id);
1009 			return res;
1010 		}
1011 		res = scmi_clk_add(clk, 0, pmc_clk->scmi_id);
1012 		if (res) {
1013 			EMSG("Failed to add PMC SCMI clock id %u",
1014 			     pmc_clk->scmi_id);
1015 			return res;
1016 		}
1017 	}
1018 
1019 	clk = at91_sckc_clk_get();
1020 	if (!clk)
1021 		return TEE_ERROR_GENERIC;
1022 
1023 	res = scmi_clk_add(clk, 0, AT91_SCMI_CLK_SCKC_SLOWCK_32K);
1024 	if (res) {
1025 		EMSG("Failed to add slow clock to SCMI clocks");
1026 		return res;
1027 	}
1028 
1029 	clk = at91_cpu_opp_clk_get();
1030 	if (clk) {
1031 		res = scmi_clk_add(clk, 0, AT91_SCMI_CLK_CPU_OPP);
1032 		if (res) {
1033 			EMSG("Failed to add CPU OPP clock to SCMI clocks");
1034 			return res;
1035 		}
1036 	}
1037 
1038 	return TEE_SUCCESS;
1039 }
1040 
1041 /*
1042  * Initialize platform SCMI resources
1043  */
1044 static TEE_Result sam_init_scmi_server(void)
1045 {
1046 	size_t i = 0;
1047 
1048 	for (i = 0; i < ARRAY_SIZE(scmi_channel); i++) {
1049 		const struct channel_resources *res = scmi_channel + i;
1050 		struct scmi_msg_channel *chan = res->channel;
1051 
1052 		/* Enforce non-secure shm mapped as device memory */
1053 		chan->shm_addr.va = (vaddr_t)phys_to_virt(chan->shm_addr.pa,
1054 							  MEM_AREA_IO_NSEC, 1);
1055 		assert(chan->shm_addr.va);
1056 
1057 		scmi_smt_init_agent_channel(chan);
1058 	}
1059 
1060 	return sam_init_scmi_clk();
1061 }
1062 
1063 driver_init_late(sam_init_scmi_server);
1064