xref: /optee_os/core/arch/arm/plat-rockchip/platform.c (revision 8e81e2f5366a971afdd2ac47fb8529d1def5feb0)
1 /*
2  * Copyright (C) 2017, Fuzhou Rockchip Electronics Co., Ltd.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  * this list of conditions and the following disclaimer.
10  *
11  * 2. Redistributions in binary form must reproduce the above copyright notice,
12  * this list of conditions and the following disclaimer in the documentation
13  * and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
19  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <initcall.h>
29 #include <io.h>
30 #include <mm/core_memprot.h>
31 #include <platform_config.h>
32 #include <stdint.h>
33 
34 #if defined(PLATFORM_FLAVOR_rk322x)
35 
36 #define SGRF_SOC_CON(n)		((n) * 4)
37 #define DDR_SGRF_DDR_CON(n)	((n) * 4)
38 #define DDR_RGN0_NS		BIT32(30)
39 #define SLAVE_ALL_NS		0xffff0000
40 
41 static TEE_Result platform_init(void)
42 {
43 	vaddr_t sgrf_base = (vaddr_t)phys_to_virt_io(SGRF_BASE);
44 	vaddr_t ddrsgrf_base = (vaddr_t)phys_to_virt_io(DDRSGRF_BASE);
45 
46 	/* Set rgn0 non-secure */
47 	write32(DDR_RGN0_NS, ddrsgrf_base + DDR_SGRF_DDR_CON(0));
48 
49 	/* Initialize all slave non-secure */
50 	write32(SLAVE_ALL_NS, sgrf_base + SGRF_SOC_CON(7));
51 	write32(SLAVE_ALL_NS, sgrf_base + SGRF_SOC_CON(8));
52 	write32(SLAVE_ALL_NS, sgrf_base + SGRF_SOC_CON(9));
53 	write32(SLAVE_ALL_NS, sgrf_base + SGRF_SOC_CON(10));
54 
55 	return TEE_SUCCESS;
56 }
57 
58 #endif
59 
60 service_init(platform_init);
61