xref: /optee_os/core/arch/arm/plat-rockchip/platform.c (revision 817466cb476de705a8e3dabe1ef165fe27a18c2f)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (C) 2017, Fuzhou Rockchip Electronics Co., Ltd.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright notice,
10  * this list of conditions and the following disclaimer.
11  *
12  * 2. Redistributions in binary form must reproduce the above copyright notice,
13  * this list of conditions and the following disclaimer in the documentation
14  * and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
20  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <initcall.h>
30 #include <io.h>
31 #include <mm/core_memprot.h>
32 #include <platform_config.h>
33 #include <stdint.h>
34 
35 #if defined(PLATFORM_FLAVOR_rk322x)
36 
37 #define SGRF_SOC_CON(n)		((n) * 4)
38 #define DDR_SGRF_DDR_CON(n)	((n) * 4)
39 #define DDR_RGN0_NS		BIT32(30)
40 #define SLAVE_ALL_NS		0xffff0000
41 
42 static TEE_Result platform_init(void)
43 {
44 	vaddr_t sgrf_base = (vaddr_t)phys_to_virt_io(SGRF_BASE);
45 	vaddr_t ddrsgrf_base = (vaddr_t)phys_to_virt_io(DDRSGRF_BASE);
46 
47 	/* Set rgn0 non-secure */
48 	write32(DDR_RGN0_NS, ddrsgrf_base + DDR_SGRF_DDR_CON(0));
49 
50 	/* Initialize all slave non-secure */
51 	write32(SLAVE_ALL_NS, sgrf_base + SGRF_SOC_CON(7));
52 	write32(SLAVE_ALL_NS, sgrf_base + SGRF_SOC_CON(8));
53 	write32(SLAVE_ALL_NS, sgrf_base + SGRF_SOC_CON(9));
54 	write32(SLAVE_ALL_NS, sgrf_base + SGRF_SOC_CON(10));
55 
56 	return TEE_SUCCESS;
57 }
58 
59 #endif
60 
61 service_init(platform_init);
62