11bb92983SJerome Forissier // SPDX-License-Identifier: BSD-2-Clause
27176a0b4SJoseph Chen /*
37176a0b4SJoseph Chen * Copyright (C) 2017, Fuzhou Rockchip Electronics Co., Ltd.
40ec6631dSHeiko Stuebner * Copyright (C) 2019, Theobroma Systems Design und Consulting GmbH
57176a0b4SJoseph Chen */
67176a0b4SJoseph Chen
77176a0b4SJoseph Chen #include <console.h>
87176a0b4SJoseph Chen #include <drivers/gic.h>
97176a0b4SJoseph Chen #include <drivers/serial8250_uart.h>
107176a0b4SJoseph Chen #include <io.h>
1165401337SJens Wiklander #include <kernel/boot.h>
127176a0b4SJoseph Chen #include <kernel/panic.h>
137176a0b4SJoseph Chen #include <mm/core_memprot.h>
147176a0b4SJoseph Chen #include <platform_config.h>
157176a0b4SJoseph Chen #include <stdint.h>
167176a0b4SJoseph Chen
173b4c661fSHeiko Stuebner #if defined(CFG_EARLY_CONSOLE)
183b4c661fSHeiko Stuebner static struct serial8250_uart_data early_console_data;
193b4c661fSHeiko Stuebner register_phys_mem_pgdir(MEM_AREA_IO_NSEC,
203b4c661fSHeiko Stuebner CFG_EARLY_CONSOLE_BASE, CFG_EARLY_CONSOLE_SIZE);
213b4c661fSHeiko Stuebner #endif
227176a0b4SJoseph Chen
23*12a5f037SAhmad Fatoum #ifdef CFG_DRAM_BASE
24*12a5f037SAhmad Fatoum register_ddr(CFG_DRAM_BASE, CFG_DRAM_SIZE);
25*12a5f037SAhmad Fatoum #endif
26*12a5f037SAhmad Fatoum #ifdef CFG_NSEC_DDR_1_BASE
27*12a5f037SAhmad Fatoum register_ddr(CFG_NSEC_DDR_1_BASE, CFG_NSEC_DDR_1_SIZE);
28*12a5f037SAhmad Fatoum #endif
29*12a5f037SAhmad Fatoum
30a557db0aSHeiko Stuebner register_phys_mem_pgdir(MEM_AREA_IO_SEC, GIC_BASE, GIC_SIZE);
317176a0b4SJoseph Chen
boot_primary_init_intc(void)32df913c6dSAlvin Chang void boot_primary_init_intc(void)
337176a0b4SJoseph Chen {
3467e55c51SEtienne Carriere gic_init(GICC_BASE, GICD_BASE);
357176a0b4SJoseph Chen }
367176a0b4SJoseph Chen
boot_secondary_init_intc(void)378aae4669SAlvin Chang void boot_secondary_init_intc(void)
387176a0b4SJoseph Chen {
396380e7c4SJens Wiklander gic_init_per_cpu();
407176a0b4SJoseph Chen }
417176a0b4SJoseph Chen
plat_console_init(void)4255ab8f06SAlvin Chang void plat_console_init(void)
437176a0b4SJoseph Chen {
443b4c661fSHeiko Stuebner #if defined(CFG_EARLY_CONSOLE)
453b4c661fSHeiko Stuebner /*
463b4c661fSHeiko Stuebner * Console devices can vary a lot between devices and
473b4c661fSHeiko Stuebner * OP-TEE will switch to the DT-based real console later,
483b4c661fSHeiko Stuebner * based on DT-devices and the systems chosen node.
493b4c661fSHeiko Stuebner * So early console is only needed for early debugging.
503b4c661fSHeiko Stuebner */
513b4c661fSHeiko Stuebner serial8250_uart_init(&early_console_data,
523b4c661fSHeiko Stuebner CFG_EARLY_CONSOLE_BASE,
533b4c661fSHeiko Stuebner CFG_EARLY_CONSOLE_CLK_IN_HZ,
543b4c661fSHeiko Stuebner CFG_EARLY_CONSOLE_BAUDRATE);
553b4c661fSHeiko Stuebner register_serial_console(&early_console_data.chip);
563b4c661fSHeiko Stuebner #endif
577176a0b4SJoseph Chen }
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