1 /* 2 * Copyright (C) 2017, Fuzhou Rockchip Electronics Co., Ltd. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #ifndef PLAT_ROCKCHIP_COMMON_H 29 #define PLAT_ROCKCHIP_COMMON_H 30 31 /* For SMP cpu bootup, they are common for rockchip platforms */ 32 #define LOCK_TAG 0xDEADBEAF 33 #define LOCK_ADDR_OFFSET 4 34 #define BOOT_ADDR_OFFSET 8 35 36 /* 37 * Some register has write-mask bits, it means if you want to set the bits, 38 * you need set the write-mask bits at the same time, the write-mask bits is 39 * in high 16-bits. The following macro definition helps you access register 40 * efficiently. 41 */ 42 #define REG_MSK_SHIFT 16 43 #define WMSK_BIT(nr) BIT((nr) + REG_MSK_SHIFT) 44 #define BIT_WITH_WMSK(nr) (BIT(nr) | WMSK_BIT(nr)) 45 #define BITS_WMSK(msk, shift) SHIFT_U32(msk, (shift) + REG_MSK_SHIFT) 46 #define BITS_WITH_WMASK(bits, msk, shift) \ 47 (SHIFT_U32(bits, shift) | BITS_WMSK(msk, shift)) 48 49 #endif 50