1PLATFORM_FLAVOR ?= generic_dt 2 3include core/arch/arm/cpu/cortex-armv8-0.mk 4 5$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 6$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 7$(call force,CFG_SCIF,y) 8$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 9$(call force,CFG_CORE_ARM64_PA_BITS,36) 10 11# Disable core ASLR for two reasons: 12# 1. There is no source for ALSR seed, as Rcar platform 13# does not provide DTB to OP-TEE. Also, there is no 14# publically available documentation on integrated 15# hardware RNG, so we can't use it either. 16# 2. OP-TEE crashes during boot with enabled CFG_CORE_ASLR. 17$(call force,CFG_CORE_ASLR,n) 18 19$(call force,CFG_TEE_CORE_NB_CORE,8) 20 21CFG_TZDRAM_START ?= 0x44100000 22CFG_TZDRAM_SIZE ?= 0x03D00000 23CFG_TEE_RAM_VA_SIZE ?= 0x100000 24ifeq ($(CFG_ARM64_core),y) 25$(call force,CFG_WITH_LPAE,y) 26supported-ta-targets = ta_arm64 27else 28$(call force,CFG_ARM32_core,y) 29endif 30 31CFG_DT ?= y 32