1PLATFORM_FLAVOR ?= salvator_h3 2 3include core/arch/arm/cpu/cortex-armv8-0.mk 4 5$(call force,CFG_GENERIC_BOOT,y) 6$(call force,CFG_PM_STUBS,y) 7$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 8$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 9$(call force,CFG_SCIF,y) 10$(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 11 12ifeq ($(PLATFORM_FLAVOR),salvator_h3) 13$(call force,CFG_TEE_CORE_NB_CORE,8) 14endif 15ifeq ($(PLATFORM_FLAVOR),salvator_h3_4x2g) 16$(call force,CFG_TEE_CORE_NB_CORE,8) 17endif 18ifeq ($(PLATFORM_FLAVOR),salvator_m3) 19$(call force,CFG_TEE_CORE_NB_CORE,6) 20# This somewhat abuses implementation of get_core_pos_mpidr() 21# M3 have 6 cores, but internaly they have ids 0, 1, 4, 5, 6, 7. 22# By setting CFG_CORE_CLUSTER_SHIFT to 1, get_core_pos_mpidr() 23# will produce correct numbers: 0, 1, 2, 3, 4, 5 24$(call force,CFG_CORE_CLUSTER_SHIFT,1) 25endif 26 27CFG_TZDRAM_START ?= 0x44100000 28CFG_TZDRAM_SIZE ?= 0x03D00000 29CFG_TEE_RAM_VA_SIZE ?= 0x100000 30ifeq ($(CFG_ARM64_core),y) 31$(call force,CFG_WITH_LPAE,y) 32supported-ta-targets = ta_arm64 33else 34$(call force,CFG_ARM32_core,y) 35endif 36 37CFG_WITH_STACK_CANARIES ?= y 38