1 /* 2 * Copyright (C) 2017 Marvell International Ltd. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <arm.h> 29 #include <console.h> 30 #include <drivers/gic.h> 31 #include <drivers/serial8250_uart.h> 32 #include <keep.h> 33 #include <kernel/generic_boot.h> 34 #include <kernel/pm_stubs.h> 35 #include <kernel/misc.h> 36 #include <kernel/panic.h> 37 #include <kernel/tee_time.h> 38 #include <mm/core_memprot.h> 39 #include <mm/core_mmu.h> 40 #include <platform_config.h> 41 #include <stdint.h> 42 #include <string.h> 43 #include <tee/entry_fast.h> 44 #include <tee/entry_std.h> 45 46 static void main_fiq(void); 47 48 static const struct thread_handlers handlers = { 49 .std_smc = tee_entry_std, 50 .fast_smc = tee_entry_fast, 51 .nintr = main_fiq, 52 .cpu_on = cpu_on_handler, 53 .cpu_off = pm_do_nothing, 54 .cpu_suspend = pm_do_nothing, 55 .cpu_resume = pm_do_nothing, 56 .system_off = pm_do_nothing, 57 .system_reset = pm_do_nothing, 58 }; 59 60 static struct gic_data gic_data; 61 static struct serial8250_uart_data console_data; 62 63 const struct thread_handlers *generic_boot_get_handlers(void) 64 { 65 return &handlers; 66 } 67 68 register_phys_mem(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, CORE_MMU_DEVICE_SIZE); 69 70 #ifdef GIC_BASE 71 register_phys_mem(MEM_AREA_IO_SEC, GICD_BASE, CORE_MMU_DEVICE_SIZE); 72 register_phys_mem(MEM_AREA_IO_SEC, GICC_BASE, CORE_MMU_DEVICE_SIZE); 73 74 void main_init_gic(void) 75 { 76 vaddr_t gicc_base; 77 vaddr_t gicd_base; 78 79 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, 80 MEM_AREA_IO_SEC); 81 gicd_base = (vaddr_t)phys_to_virt(GIC_BASE + GICD_OFFSET, 82 MEM_AREA_IO_SEC); 83 if (!gicc_base || !gicd_base) 84 panic(); 85 86 gic_init_base_addr(&gic_data, gicc_base, gicd_base); 87 88 itr_init(&gic_data.chip); 89 } 90 #endif 91 92 static void main_fiq(void) 93 { 94 gic_it_handle(&gic_data); 95 } 96 97 void console_init(void) 98 { 99 serial8250_uart_init(&console_data, CONSOLE_UART_BASE, 100 CONSOLE_UART_CLK_IN_HZ, CONSOLE_BAUDRATE); 101 register_serial_console(&console_data.chip); 102 } 103