xref: /optee_os/core/arch/arm/plat-marvell/conf.mk (revision e9eaf44aa1dd856d4b9cf51988a5df52caafce94)
1PLATFORM_FLAVOR ?= armada7k8k
2
3ifeq ($(PLATFORM_FLAVOR),armada7k8k)
4include core/arch/arm/cpu/cortex-armv8-0.mk
5$(call force,CFG_TEE_CORE_NB_CORE,4)
6$(call force,CFG_TZDRAM_START,0x04400000)
7$(call force,CFG_TZDRAM_SIZE,0x00C00000)
8$(call force,CFG_SHMEM_START,0x05000000)
9$(call force,CFG_SHMEM_SIZE,0x00400000)
10$(call force,CFG_TEE_RAM_VA_SIZE,0x00400000)
11# If Secure Data Path is enabled, uses the TZDRAM last 4MByte
12$(call force,CFG_TEE_SDP_MEM_SIZE,0x00400000)
13# Total DRAM size for dynamic shared memory registration
14CFG_DDR_SIZE ?= 0x80000000
15platform-debugger-arm := 1
16$(call force,CFG_8250_UART,y)
17endif
18
19ifeq ($(PLATFORM_FLAVOR),armada3700)
20include core/arch/arm/cpu/cortex-armv8-0.mk
21$(call force,CFG_TEE_CORE_NB_CORE,2)
22$(call force,CFG_TZDRAM_START,0x04400000)
23$(call force,CFG_TZDRAM_SIZE,0x00C00000)
24$(call force,CFG_SHMEM_START,0x05000000)
25$(call force,CFG_SHMEM_SIZE,0x00400000)
26$(call force,CFG_TEE_RAM_VA_SIZE,0x00400000)
27# If Secure Data Path is enabled, uses the TZDRAM last 4MByte
28$(call force,CFG_TEE_SDP_MEM_SIZE,0x00400000)
29# Total DRAM size for dynamic shared memory registration
30CFG_DDR_SIZE ?= 0x80000000
31platform-debugger-arm := 1
32$(call force,CFG_MVEBU_UART,y)
33$(call force,CFG_ARM_GICV3,y)
34endif
35
36ifeq ($(PLATFORM_FLAVOR),otx2t96)
37include core/arch/arm/cpu/cortex-armv8-0.mk
38$(call force,CFG_TEE_CORE_NB_CORE,24)
39$(call force,CFG_CLUSTERS_PER_NODE,4)
40$(call force,CFG_TZDRAM_START,0x00001000)
41$(call force,CFG_TZDRAM_SIZE,0x000a00000)
42$(call force,CFG_SHMEM_START,0x01000000)
43$(call force,CFG_SHMEM_SIZE,0x00800000)
44$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
45$(call force,CFG_CORE_ARM64_PA_BITS,48)
46$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
47$(call force,CFG_PL011,y)
48$(call force,CFG_ARM_GICV3,y)
49CFG_HW_UNQ_KEY_SUPPORT ?= y
50CFG_USER_TA_TARGETS ?= ta_arm64
51CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
52CFG_CORE_HEAP_SIZE ?= 131072
53endif
54
55ifeq ($(PLATFORM_FLAVOR),otx2f95)
56include core/arch/arm/cpu/cortex-armv8-0.mk
57$(call force,CFG_TEE_CORE_NB_CORE,6)
58$(call force,CFG_CLUSTERS_PER_NODE,1)
59$(call force,CFG_TZDRAM_START,0x00001000)
60$(call force,CFG_TZDRAM_SIZE,0x000a00000)
61$(call force,CFG_SHMEM_START,0x01000000)
62$(call force,CFG_SHMEM_SIZE,0x00800000)
63$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
64$(call force,CFG_CORE_ARM64_PA_BITS,48)
65$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
66$(call force,CFG_PL011,y)
67$(call force,CFG_ARM_GICV3,y)
68CFG_HW_UNQ_KEY_SUPPORT ?= y
69CFG_USER_TA_TARGETS ?= ta_arm64
70CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
71CFG_CORE_HEAP_SIZE ?= 131072
72endif
73
74ifeq ($(PLATFORM_FLAVOR),otx2t98)
75include core/arch/arm/cpu/cortex-armv8-0.mk
76$(call force,CFG_TEE_CORE_NB_CORE,36)
77$(call force,CFG_CLUSTERS_PER_NODE,6)
78$(call force,CFG_TZDRAM_START,0x00001000)
79$(call force,CFG_TZDRAM_SIZE,0x000a00000)
80$(call force,CFG_SHMEM_START,0x01000000)
81$(call force,CFG_SHMEM_SIZE,0x00800000)
82$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
83$(call force,CFG_CORE_ARM64_PA_BITS,48)
84#$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
85$(call force,CFG_PL011,y)
86$(call force,CFG_ARM_GICV3,y)
87CFG_HW_UNQ_KEY_SUPPORT ?= y
88CFG_USER_TA_TARGETS ?= ta_arm64
89CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
90CFG_CORE_HEAP_SIZE ?= 131072
91endif
92
93ifeq ($(PLATFORM_FLAVOR),cn10ka)
94include core/arch/arm/cpu/cortex-armv8-0.mk
95$(call force,CFG_TEE_CORE_NB_CORE,24)
96$(call force,CFG_TZDRAM_START,0x00001000)
97$(call force,CFG_TZDRAM_SIZE,0x000a00000)
98$(call force,CFG_SHMEM_START,0x03400000)
99$(call force,CFG_SHMEM_SIZE,0x00800000)
100$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
101$(call force,CFG_CORE_ARM64_PA_BITS,48)
102$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
103$(call force,CFG_PL011,y)
104$(call force,CFG_ARM_GICV3,y)
105CFG_USER_TA_TARGETS ?= ta_arm64
106CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
107CFG_CORE_HEAP_SIZE ?= 131072
108endif
109
110ifeq ($(PLATFORM_FLAVOR),cn10kb)
111include core/arch/arm/cpu/cortex-armv8-0.mk
112$(call force,CFG_TEE_CORE_NB_CORE,8)
113$(call force,CFG_TZDRAM_START,0x00001000)
114$(call force,CFG_TZDRAM_SIZE,0x000a00000)
115$(call force,CFG_SHMEM_START,0x03400000)
116$(call force,CFG_SHMEM_SIZE,0x00800000)
117$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
118$(call force,CFG_CORE_ARM64_PA_BITS,48)
119$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
120$(call force,CFG_PL011,y)
121$(call force,CFG_ARM_GICV3,y)
122CFG_USER_TA_TARGETS ?= ta_arm64
123CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
124CFG_CORE_HEAP_SIZE ?= 131072
125endif
126
127ifeq ($(PLATFORM_FLAVOR),cnf10ka)
128include core/arch/arm/cpu/cortex-armv8-0.mk
129$(call force,CFG_TEE_CORE_NB_CORE,18)
130$(call force,CFG_TZDRAM_START,0x00001000)
131$(call force,CFG_TZDRAM_SIZE,0x000a00000)
132$(call force,CFG_SHMEM_START,0x03400000)
133$(call force,CFG_SHMEM_SIZE,0x00800000)
134$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
135$(call force,CFG_CORE_ARM64_PA_BITS,48)
136$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
137$(call force,CFG_PL011,y)
138$(call force,CFG_ARM_GICV3,y)
139CFG_USER_TA_TARGETS ?= ta_arm64
140CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
141CFG_CORE_HEAP_SIZE ?= 131072
142endif
143
144ifeq ($(PLATFORM_FLAVOR),cnf10kb)
145include core/arch/arm/cpu/cortex-armv8-0.mk
146$(call force,CFG_TEE_CORE_NB_CORE,12)
147$(call force,CFG_TZDRAM_START,0x00001000)
148$(call force,CFG_TZDRAM_SIZE,0x000a00000)
149$(call force,CFG_SHMEM_START,0x03400000)
150$(call force,CFG_SHMEM_SIZE,0x00800000)
151$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
152$(call force,CFG_CORE_ARM64_PA_BITS,48)
153$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
154$(call force,CFG_PL011,y)
155$(call force,CFG_ARM_GICV3,y)
156CFG_USER_TA_TARGETS ?= ta_arm64
157CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
158CFG_CORE_HEAP_SIZE ?= 131072
159endif
160
161ifeq ($(PLATFORM_FLAVOR),cn20ka)
162include core/arch/arm/cpu/cortex-armv8-0.mk
163$(call force,CFG_TEE_CORE_NB_CORE,42)
164$(call force,CFG_TZDRAM_START,0x00001000)
165$(call force,CFG_TZDRAM_SIZE,0x000900000)
166$(call force,CFG_SHMEM_START,0x03400000)
167$(call force,CFG_SHMEM_SIZE,0x00800000)
168$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
169$(call force,CFG_CORE_ARM64_PA_BITS,48)
170$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
171$(call force,CFG_PL011,y)
172$(call force,CFG_ARM_GICV3,y)
173CFG_USER_TA_TARGETS ?= ta_arm64
174CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
175CFG_CORE_HEAP_SIZE ?= 131072
176CFG_TEE_DYN_VASPACE_SIZE ?= (1024 * 1024 * 2)
177endif
178
179ifeq ($(PLATFORM_FLAVOR),cnf20ka)
180include core/arch/arm/cpu/cortex-armv8-0.mk
181$(call force,CFG_TEE_CORE_NB_CORE,16)
182$(call force,CFG_TZDRAM_START,0x00001000)
183$(call force,CFG_TZDRAM_SIZE,0x000900000)
184$(call force,CFG_SHMEM_START,0x03400000)
185$(call force,CFG_SHMEM_SIZE,0x00800000)
186$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
187$(call force,CFG_CORE_ARM64_PA_BITS,48)
188$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
189$(call force,CFG_PL011,y)
190$(call force,CFG_ARM_GICV3,y)
191CFG_USER_TA_TARGETS ?= ta_arm64
192CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
193CFG_CORE_HEAP_SIZE ?= 131072
194endif
195
196ifeq ($(platform-debugger-arm),1)
197# ARM debugger needs this
198platform-cflags-debug-info = -gdwarf-2
199platform-aflags-debug-info = -gdwarf-2
200endif
201
202$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
203$(call force,CFG_ARM64_core,y)
204$(call force,CFG_GIC,y)
205$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
206$(call force,CFG_CORE_CLUSTER_SHIFT,1)
207
208CFG_WITH_STATS ?= y
209