xref: /optee_os/core/arch/arm/plat-marvell/conf.mk (revision 9f34db38245c9b3a4e6e7e63eb78a75e23ab2da3)
1PLATFORM_FLAVOR ?= armada7k8k
2
3ifeq ($(PLATFORM_FLAVOR),armada7k8k)
4include core/arch/arm/cpu/cortex-armv8-0.mk
5$(call force,CFG_TEE_CORE_NB_CORE,4)
6$(call force,CFG_TZDRAM_START,0x04400000)
7$(call force,CFG_TZDRAM_SIZE,0x00C00000)
8$(call force,CFG_SHMEM_START,0x05000000)
9$(call force,CFG_SHMEM_SIZE,0x00400000)
10$(call force,CFG_TEE_RAM_VA_SIZE,0x00400000)
11# If Secure Data Path is enabled, uses the TZDRAM last 4MByte
12$(call force,CFG_TEE_SDP_MEM_SIZE,0x00400000)
13platform-debugger-arm := 1
14$(call force,CFG_8250_UART,y)
15endif
16
17ifeq ($(PLATFORM_FLAVOR),armada3700)
18include core/arch/arm/cpu/cortex-armv8-0.mk
19$(call force,CFG_TEE_CORE_NB_CORE,2)
20$(call force,CFG_TZDRAM_START,0x04400000)
21$(call force,CFG_TZDRAM_SIZE,0x00C00000)
22$(call force,CFG_SHMEM_START,0x05000000)
23$(call force,CFG_SHMEM_SIZE,0x00400000)
24$(call force,CFG_TEE_RAM_VA_SIZE,0x00400000)
25# If Secure Data Path is enabled, uses the TZDRAM last 4MByte
26$(call force,CFG_TEE_SDP_MEM_SIZE,0x00400000)
27platform-debugger-arm := 1
28$(call force,CFG_MVEBU_UART,y)
29$(call force,CFG_ARM_GICV3,y)
30endif
31
32ifeq ($(PLATFORM_FLAVOR),otx2t96)
33include core/arch/arm/cpu/cortex-armv8-0.mk
34$(call force,CFG_TEE_CORE_NB_CORE,24)
35$(call force,CFG_CLUSTERS_PER_NODE,4)
36$(call force,CFG_TZDRAM_START,0x00001000)
37$(call force,CFG_TZDRAM_SIZE,0x000a00000)
38$(call force,CFG_SHMEM_START,0x01000000)
39$(call force,CFG_SHMEM_SIZE,0x00800000)
40$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
41$(call force,CFG_CORE_ARM64_PA_BITS,48)
42$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
43$(call force,CFG_PL011,y)
44$(call force,CFG_ARM_GICV3,y)
45CFG_HW_UNQ_KEY_SUPPORT ?= y
46CFG_USER_TA_TARGETS ?= ta_arm64
47CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
48CFG_CORE_HEAP_SIZE ?= 131072
49endif
50
51ifeq ($(PLATFORM_FLAVOR),otx2f95)
52include core/arch/arm/cpu/cortex-armv8-0.mk
53$(call force,CFG_TEE_CORE_NB_CORE,6)
54$(call force,CFG_CLUSTERS_PER_NODE,1)
55$(call force,CFG_TZDRAM_START,0x00001000)
56$(call force,CFG_TZDRAM_SIZE,0x000a00000)
57$(call force,CFG_SHMEM_START,0x01000000)
58$(call force,CFG_SHMEM_SIZE,0x00800000)
59$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
60$(call force,CFG_CORE_ARM64_PA_BITS,48)
61$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
62$(call force,CFG_PL011,y)
63$(call force,CFG_ARM_GICV3,y)
64CFG_HW_UNQ_KEY_SUPPORT ?= y
65CFG_USER_TA_TARGETS ?= ta_arm64
66CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
67CFG_CORE_HEAP_SIZE ?= 131072
68endif
69
70ifeq ($(PLATFORM_FLAVOR),otx2t98)
71include core/arch/arm/cpu/cortex-armv8-0.mk
72$(call force,CFG_TEE_CORE_NB_CORE,36)
73$(call force,CFG_CLUSTERS_PER_NODE,6)
74$(call force,CFG_TZDRAM_START,0x00001000)
75$(call force,CFG_TZDRAM_SIZE,0x000a00000)
76$(call force,CFG_SHMEM_START,0x01000000)
77$(call force,CFG_SHMEM_SIZE,0x00800000)
78$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
79$(call force,CFG_CORE_ARM64_PA_BITS,48)
80#$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
81$(call force,CFG_PL011,y)
82$(call force,CFG_ARM_GICV3,y)
83CFG_HW_UNQ_KEY_SUPPORT ?= y
84CFG_USER_TA_TARGETS ?= ta_arm64
85CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
86CFG_CORE_HEAP_SIZE ?= 131072
87endif
88
89ifeq ($(PLATFORM_FLAVOR),cn10ka)
90include core/arch/arm/cpu/cortex-armv8-0.mk
91$(call force,CFG_TEE_CORE_NB_CORE,24)
92$(call force,CFG_TZDRAM_START,0x00001000)
93$(call force,CFG_TZDRAM_SIZE,0x000a00000)
94$(call force,CFG_SHMEM_START,0x03400000)
95$(call force,CFG_SHMEM_SIZE,0x00800000)
96$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
97$(call force,CFG_CORE_ARM64_PA_BITS,48)
98$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
99$(call force,CFG_PL011,y)
100$(call force,CFG_ARM_GICV3,y)
101CFG_USER_TA_TARGETS ?= ta_arm64
102CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
103CFG_CORE_HEAP_SIZE ?= 131072
104endif
105
106ifeq ($(PLATFORM_FLAVOR),cn10kb)
107include core/arch/arm/cpu/cortex-armv8-0.mk
108$(call force,CFG_TEE_CORE_NB_CORE,8)
109$(call force,CFG_TZDRAM_START,0x00001000)
110$(call force,CFG_TZDRAM_SIZE,0x000a00000)
111$(call force,CFG_SHMEM_START,0x03400000)
112$(call force,CFG_SHMEM_SIZE,0x00800000)
113$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
114$(call force,CFG_CORE_ARM64_PA_BITS,48)
115$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
116$(call force,CFG_PL011,y)
117$(call force,CFG_ARM_GICV3,y)
118CFG_USER_TA_TARGETS ?= ta_arm64
119CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
120CFG_CORE_HEAP_SIZE ?= 131072
121endif
122
123ifeq ($(PLATFORM_FLAVOR),cnf10ka)
124include core/arch/arm/cpu/cortex-armv8-0.mk
125$(call force,CFG_TEE_CORE_NB_CORE,18)
126$(call force,CFG_TZDRAM_START,0x00001000)
127$(call force,CFG_TZDRAM_SIZE,0x000a00000)
128$(call force,CFG_SHMEM_START,0x03400000)
129$(call force,CFG_SHMEM_SIZE,0x00800000)
130$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
131$(call force,CFG_CORE_ARM64_PA_BITS,48)
132$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
133$(call force,CFG_PL011,y)
134$(call force,CFG_ARM_GICV3,y)
135CFG_USER_TA_TARGETS ?= ta_arm64
136CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
137CFG_CORE_HEAP_SIZE ?= 131072
138endif
139
140ifeq ($(PLATFORM_FLAVOR),cnf10kb)
141include core/arch/arm/cpu/cortex-armv8-0.mk
142$(call force,CFG_TEE_CORE_NB_CORE,12)
143$(call force,CFG_TZDRAM_START,0x00001000)
144$(call force,CFG_TZDRAM_SIZE,0x000a00000)
145$(call force,CFG_SHMEM_START,0x03400000)
146$(call force,CFG_SHMEM_SIZE,0x00800000)
147$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
148$(call force,CFG_CORE_ARM64_PA_BITS,48)
149$(call force,CFG_LPAE_ADDR_SPACE_BITS,36)
150$(call force,CFG_PL011,y)
151$(call force,CFG_ARM_GICV3,y)
152CFG_USER_TA_TARGETS ?= ta_arm64
153CFG_NUM_THREADS ?= CFG_TEE_CORE_NB_CORE
154CFG_CORE_HEAP_SIZE ?= 131072
155endif
156
157ifeq ($(platform-debugger-arm),1)
158# ARM debugger needs this
159platform-cflags-debug-info = -gdwarf-2
160platform-aflags-debug-info = -gdwarf-2
161endif
162
163$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
164$(call force,CFG_ARM64_core,y)
165$(call force,CFG_GIC,y)
166$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
167$(call force,CFG_CORE_CLUSTER_SHIFT,1)
168
169CFG_WITH_STATS ?= y
170